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authorShawn Guo <shawn.guo@linaro.org>2017-01-12 22:20:31 +0800
committerShawn Guo <shawn.guo@linaro.org>2017-01-28 11:51:22 +0800
commit9cc2a68519aeac42775161a4131d91120f3a927e (patch)
treee8b439205ffd2a66664678c2c4c190aa4ad8393f /drivers/gpu/drm/zte/zx_vou.h
parent831a8d5e0bef97ae89b68dd3a637f0834cb6977b (diff)
downloadlinux-9cc2a68519aeac42775161a4131d91120f3a927e.tar.bz2
drm: zte: add function to configure vou_ctrl dividers
The clock control module (CRM) cannot always provide desired frequency for all VOU output devices. That's why VOU integrates a few dividers to further divide the clocks from CRM. Let's add an interface for configuring these dividers. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Sean Paul <seanpaul@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/zte/zx_vou.h')
-rw-r--r--drivers/gpu/drm/zte/zx_vou.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/gpu/drm/zte/zx_vou.h b/drivers/gpu/drm/zte/zx_vou.h
index 688c203d90b6..57e3c31ee6a5 100644
--- a/drivers/gpu/drm/zte/zx_vou.h
+++ b/drivers/gpu/drm/zte/zx_vou.h
@@ -36,6 +36,31 @@ void vou_inf_hdmi_audio_sel(struct drm_crtc *crtc,
void vou_inf_enable(enum vou_inf_id id, struct drm_crtc *crtc);
void vou_inf_disable(enum vou_inf_id id, struct drm_crtc *crtc);
+enum vou_div_id {
+ VOU_DIV_VGA,
+ VOU_DIV_PIC,
+ VOU_DIV_TVENC,
+ VOU_DIV_HDMI_PNX,
+ VOU_DIV_HDMI,
+ VOU_DIV_INF,
+ VOU_DIV_LAYER,
+};
+
+enum vou_div_val {
+ VOU_DIV_1 = 0,
+ VOU_DIV_2 = 1,
+ VOU_DIV_4 = 3,
+ VOU_DIV_8 = 7,
+};
+
+struct vou_div_config {
+ enum vou_div_id id;
+ enum vou_div_val val;
+};
+
+void zx_vou_config_dividers(struct drm_crtc *crtc,
+ struct vou_div_config *configs, int num);
+
int zx_vou_enable_vblank(struct drm_device *drm, unsigned int pipe);
void zx_vou_disable_vblank(struct drm_device *drm, unsigned int pipe);