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| author | Shawn Guo <shawn.guo@linaro.org> | 2017-04-06 23:01:08 +0800 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2017-05-04 13:51:52 +0800 |
| commit | 9e42b263e8c0bd2bf0faac046aff26f0b34e603e (patch) | |
| tree | 3d555e8e441d7fb20b21cbe8b81bf66d61a1e04f /drivers/gpu/drm/zte/zx_common_regs.h | |
| parent | 893898f583f0ce4415e1b74399a14632c43a7bbe (diff) | |
| download | linux-9e42b263e8c0bd2bf0faac046aff26f0b34e603e.tar.bz2 | |
drm: zte: move CSC register definitions into a common header
The CSC (Color Space Conversion) block in VOU is used by not only
Graphic Layer (plane) but also channel (CRTC) module. Let's move
its register definitions into a common header, so that CRTC driver can
include it when needed.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1491490870-6330-3-git-send-email-shawnguo@kernel.org
Diffstat (limited to 'drivers/gpu/drm/zte/zx_common_regs.h')
| -rw-r--r-- | drivers/gpu/drm/zte/zx_common_regs.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/gpu/drm/zte/zx_common_regs.h b/drivers/gpu/drm/zte/zx_common_regs.h new file mode 100644 index 000000000000..2afd80664c51 --- /dev/null +++ b/drivers/gpu/drm/zte/zx_common_regs.h @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2017 Sanechips Technology Co., Ltd. + * Copyright 2017 Linaro Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ZX_COMMON_REGS_H__ +#define __ZX_COMMON_REGS_H__ + +/* CSC registers */ +#define CSC_CTRL0 0x30 +#define CSC_COV_MODE_SHIFT 16 +#define CSC_COV_MODE_MASK (0xffff << CSC_COV_MODE_SHIFT) +#define CSC_BT601_IMAGE_RGB2YCBCR 0 +#define CSC_BT601_IMAGE_YCBCR2RGB 1 +#define CSC_BT601_VIDEO_RGB2YCBCR 2 +#define CSC_BT601_VIDEO_YCBCR2RGB 3 +#define CSC_BT709_IMAGE_RGB2YCBCR 4 +#define CSC_BT709_IMAGE_YCBCR2RGB 5 +#define CSC_BT709_VIDEO_RGB2YCBCR 6 +#define CSC_BT709_VIDEO_YCBCR2RGB 7 +#define CSC_BT2020_IMAGE_RGB2YCBCR 8 +#define CSC_BT2020_IMAGE_YCBCR2RGB 9 +#define CSC_BT2020_VIDEO_RGB2YCBCR 10 +#define CSC_BT2020_VIDEO_YCBCR2RGB 11 +#define CSC_WORK_ENABLE BIT(0) + +#endif /* __ZX_COMMON_REGS_H__ */ |