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author | Thomas Zimmermann <tzimmermann@suse.de> | 2020-04-17 08:12:22 +0200 |
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committer | Thomas Zimmermann <tzimmermann@suse.de> | 2020-04-17 08:12:22 +0200 |
commit | 08d99b2c23dfa84ca5b5e5c194062a0550888b71 (patch) | |
tree | f4cf81ba52b375bbafd3b7ee2603b3a4cae7fe30 /drivers/gpu/drm/vc4 | |
parent | 13e3d94110d82e318d640d0980896d32e02ba4d6 (diff) | |
parent | 8f3d9f354286745c751374f5f1fcafee6b3f3136 (diff) | |
download | linux-08d99b2c23dfa84ca5b5e5c194062a0550888b71.tar.bz2 |
Merge drm/drm-next into drm-misc-next
Backmerging required to pull topic/phy-compliance.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Diffstat (limited to 'drivers/gpu/drm/vc4')
-rw-r--r-- | drivers/gpu/drm/vc4/vc4_hdmi.c | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 8f956156eb8e..625bfcf52dc4 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -673,11 +673,23 @@ static enum drm_mode_status vc4_hdmi_encoder_mode_valid(struct drm_encoder *crtc, const struct drm_display_mode *mode) { - /* HSM clock must be 108% of the pixel clock. Additionally, - * the AXI clock needs to be at least 25% of pixel clock, but - * HSM ends up being the limiting factor. + /* + * As stated in RPi's vc4 firmware "HDMI state machine (HSM) clock must + * be faster than pixel clock, infinitesimally faster, tested in + * simulation. Otherwise, exact value is unimportant for HDMI + * operation." This conflicts with bcm2835's vc4 documentation, which + * states HSM's clock has to be at least 108% of the pixel clock. + * + * Real life tests reveal that vc4's firmware statement holds up, and + * users are able to use pixel clocks closer to HSM's, namely for + * 1920x1200@60Hz. So it was decided to have leave a 1% margin between + * both clocks. Which, for RPi0-3 implies a maximum pixel clock of + * 162MHz. + * + * Additionally, the AXI clock needs to be at least 25% of + * pixel clock, but HSM ends up being the limiting factor. */ - if (mode->clock > HSM_CLOCK_FREQ / (1000 * 108 / 100)) + if (mode->clock > HSM_CLOCK_FREQ / (1000 * 101 / 100)) return MODE_CLOCK_HIGH; return MODE_OK; |