diff options
| author | Darren Etheridge <detheridge@ti.com> | 2014-01-15 15:52:36 -0600 |
|---|---|---|
| committer | Jyri Sarha <jsarha@ti.com> | 2016-02-25 16:39:28 +0200 |
| commit | 3d19306a8240a163f6b02bb46213c277d6d44e08 (patch) | |
| tree | 33f1f360603ed2f8b13b19c4d7045d59d873cc2e /drivers/gpu/drm/tilcdc/tilcdc_drv.h | |
| parent | 0041ee4d3642f9ad80a479fbe51a4bc7f3cd8294 (diff) | |
| download | linux-3d19306a8240a163f6b02bb46213c277d6d44e08.tar.bz2 | |
drm/tilcdc: rewrite pixel clock calculation
Updating the tilcdc DRM driver code to calculate the LCD controller
pixel clock more accurately. Based on a suggested implementation by
Tomi Valkeinen.
The current code does not work correctly and produces wrong results
with many requested clock rates. It also oddly uses two different
clocks, a display pll clock and a divider clock (child of display
pll), instead of just using the clock coming to the lcdc.
This patch removes the use of the display pll clock, and rewrites the
code to calculate the clock rates. The idea is simply to request a
clock rate of pixelclock*2, as the LCD controller has an internal
divider which we set to 2.
Signed-off-by: Darren Etheridge <detheridge@ti.com>
[Rewrapped description]
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/tilcdc/tilcdc_drv.h')
| -rw-r--r-- | drivers/gpu/drm/tilcdc/tilcdc_drv.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/tilcdc_drv.h index 66105d8dc620..62a1d688e6b3 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -49,7 +49,6 @@ struct tilcdc_drm_private { void __iomem *mmio; - struct clk *disp_clk; /* display dpll */ struct clk *clk; /* functional clock */ int rev; /* IP revision */ |