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author | Thierry Reding <treding@nvidia.com> | 2021-03-26 15:51:38 +0100 |
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committer | Thierry Reding <treding@nvidia.com> | 2021-03-31 17:42:14 +0200 |
commit | 05d1adfe2a8b5c6a794a9927d1991a00c5d68f1d (patch) | |
tree | aea04b7caa98ee97111708a97211b277d0033177 /drivers/gpu/drm/tegra/hub.c | |
parent | 476e93205ff61a6507bcba28f4f01269b65ebb38 (diff) | |
download | linux-05d1adfe2a8b5c6a794a9927d1991a00c5d68f1d.tar.bz2 |
drm/tegra: Count number of display controllers at runtime
In order to be able to attach planes to all possible display controllers
the exact number of CRTCs must be known. Keep track of the number of the
display controllers that register during initialization.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/hub.c')
-rw-r--r-- | drivers/gpu/drm/tegra/hub.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/tegra/hub.c b/drivers/gpu/drm/tegra/hub.c index 617240032c37..500c9d37e654 100644 --- a/drivers/gpu/drm/tegra/hub.c +++ b/drivers/gpu/drm/tegra/hub.c @@ -562,9 +562,8 @@ struct drm_plane *tegra_shared_plane_create(struct drm_device *drm, enum drm_plane_type type = DRM_PLANE_TYPE_OVERLAY; struct tegra_drm *tegra = drm->dev_private; struct tegra_display_hub *hub = tegra->hub; - /* planes can be assigned to arbitrary CRTCs */ - unsigned int possible_crtcs = 0x7; struct tegra_shared_plane *plane; + unsigned int possible_crtcs; unsigned int num_formats; const u64 *modifiers; struct drm_plane *p; @@ -583,6 +582,9 @@ struct drm_plane *tegra_shared_plane_create(struct drm_device *drm, p = &plane->base.base; + /* planes can be assigned to arbitrary CRTCs */ + possible_crtcs = BIT(tegra->num_crtcs) - 1; + num_formats = ARRAY_SIZE(tegra_shared_plane_formats); formats = tegra_shared_plane_formats; modifiers = tegra_shared_plane_modifiers; |