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| author | Alex Deucher <alexander.deucher@amd.com> | 2013-01-23 18:57:56 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-01-31 16:24:55 -0500 |
| commit | b21b6e7aab9d0ee97f6d3cf3654fda4348b3b7ea (patch) | |
| tree | c14d7625df864e8ca4340f71f3c35a8d98a6c8d3 /drivers/gpu/drm/radeon | |
| parent | ca57802e521de54341efc8a56f70571f79ffac72 (diff) | |
| download | linux-b21b6e7aab9d0ee97f6d3cf3654fda4348b3b7ea.tar.bz2 | |
drm/radeon: halt engines before disabling MC (evergreen)
It's better to halt the engines before we disable the MC.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon')
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index fd5e0025b656..f77e33262274 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -2460,11 +2460,6 @@ static void evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) evergreen_print_gpu_status_regs(rdev); - evergreen_mc_stop(rdev, &save); - if (evergreen_mc_wait_for_idle(rdev)) { - dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); - } - /* Disable CP parsing/prefetching */ WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT); @@ -2475,6 +2470,13 @@ static void evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) WREG32(DMA_RB_CNTL, tmp); } + udelay(50); + + evergreen_mc_stop(rdev, &save); + if (evergreen_mc_wait_for_idle(rdev)) { + dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); + } + if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE)) { grbm_soft_reset |= SOFT_RESET_DB | SOFT_RESET_CB | |