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| author | Alex Deucher <alexander.deucher@amd.com> | 2015-02-23 10:59:36 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2015-03-19 12:26:25 -0400 |
| commit | 643b1f5629a30f979e2da678ecf0b1855e074a8c (patch) | |
| tree | c5d92782fc13f58a3119dc84709f9c93cd02d511 /drivers/gpu/drm/radeon/radeon_display.c | |
| parent | 67ba31d3528e2460b2243b2d139b70fa479602e8 (diff) | |
| download | linux-643b1f5629a30f979e2da678ecf0b1855e074a8c.tar.bz2 | |
drm/radeon: implement output csc property for DCE5+
Implement the property for DCE5+ asics. Older asics
require a slightly more complex process.
bug:
https://bugs.freedesktop.org/show_bug.cgi?id=83226
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_display.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index d57dfb954257..d2e9e9efc159 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c @@ -154,7 +154,7 @@ static void dce5_crtc_load_lut(struct drm_crtc *crtc) (NI_GRPH_REGAMMA_MODE(NI_REGAMMA_BYPASS) | NI_OVL_REGAMMA_MODE(NI_REGAMMA_BYPASS))); WREG32(NI_OUTPUT_CSC_CONTROL + radeon_crtc->crtc_offset, - (NI_OUTPUT_CSC_GRPH_MODE(NI_OUTPUT_CSC_BYPASS) | + (NI_OUTPUT_CSC_GRPH_MODE(radeon_crtc->output_csc) | NI_OUTPUT_CSC_OVL_MODE(NI_OUTPUT_CSC_BYPASS))); /* XXX match this to the depth of the crtc fmt block, move to modeset? */ WREG32(0x6940 + radeon_crtc->crtc_offset, 0); |