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| author | Andreas Pretzsch <apr@cn-eng.de> | 2019-04-16 12:16:30 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2019-04-23 14:22:27 +0200 |
| commit | c2d24af620c16de34b0db435b4a456791ecdaf86 (patch) | |
| tree | 5e30faec01aaa93b55e8464e755a53b67832e052 /drivers/gpu/drm/panel | |
| parent | c9219ae4bd5db34a3b14e1e01bed2c7ef2ad9a16 (diff) | |
| download | linux-c2d24af620c16de34b0db435b4a456791ecdaf86.tar.bz2 | |
drm/panel: simple: Add support for EDT ET035012DM6
Add support for the EDT ET035012DM6 3.5" 320x240 QVGA 24-bit RGB TFT.
The datasheet with all specs can be retrieved online:
https://www.glynshop.com/erp/owweb/Daten/DSS/EDT/Products/ \
Specifications/Active%20Displays/ET035012DM6.pdf
Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
[m.felsch@pengutronix.de: adapt commit message]
[m.felsch@pengutronix.de: rm unecessary comments]
[m.felsch@pengutronix.de: correct data_enable polarity]
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190416101630.3482-2-m.felsch@pengutronix.de
Diffstat (limited to 'drivers/gpu/drm/panel')
| -rw-r--r-- | drivers/gpu/drm/panel/panel-simple.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 7f4668af6ac3..85430981af68 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1096,6 +1096,32 @@ static const struct panel_desc dlc_dlc1010gig = { .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, }; +static const struct drm_display_mode edt_et035012dm6_mode = { + .clock = 6500, + .hdisplay = 320, + .hsync_start = 320 + 20, + .hsync_end = 320 + 20 + 30, + .htotal = 320 + 20 + 68, + .vdisplay = 240, + .vsync_start = 240 + 4, + .vsync_end = 240 + 4 + 4, + .vtotal = 240 + 4 + 4 + 14, + .vrefresh = 60, + .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, +}; + +static const struct panel_desc edt_et035012dm6 = { + .modes = &edt_et035012dm6_mode, + .num_modes = 1, + .bpc = 8, + .size = { + .width = 70, + .height = 52, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .bus_flags = DRM_BUS_FLAG_DE_LOW | DRM_BUS_FLAG_PIXDATA_NEGEDGE, +}; + static const struct drm_display_mode edt_etm0430g0dh6_mode = { .clock = 9000, .hdisplay = 480, @@ -2721,6 +2747,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "dlc,dlc1010gig", .data = &dlc_dlc1010gig, }, { + .compatible = "edt,et035012dm6", + .data = &edt_et035012dm6, + }, { .compatible = "edt,etm0430g0dh6", .data = &edt_etm0430g0dh6, }, { |