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| author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2016-09-22 14:06:52 +0300 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2016-11-02 10:48:18 +0200 |
| commit | 0996c68e1bf7364ca7f02ac06048c12abb56c37a (patch) | |
| tree | bcc6e4e37a72a0665be0df800edb8cdb12001283 /drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | |
| parent | d5bcf0aa3f6fb396fc8099a4e5960f9274b0dae9 (diff) | |
| download | linux-0996c68e1bf7364ca7f02ac06048c12abb56c37a.tar.bz2 | |
drm/omap: omap_display_timings: rename vfp to vfront_porch
In preparation to move the stack to use the generic videmode struct for
display timing information rename the vfp member to vfront_porch.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm/dss/hdmi5_core.c')
| -rw-r--r-- | drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c index 39944749c160..932975b372c0 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c @@ -300,7 +300,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg, cfg->timings.hback_porch + cfg->timings.hsync_len; video_cfg->vblank_osc = 0; video_cfg->vblank = cfg->timings.vsync_len + - cfg->timings.vfp + cfg->timings.vbp; + cfg->timings.vfront_porch + cfg->timings.vbp; video_cfg->v_fc_config.hdmi_dvi_mode = cfg->hdmi_dvi_mode; if (cfg->timings.interlace) { @@ -310,7 +310,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg, video_cfg->v_fc_config.timings.vactive /= 2; video_cfg->vblank /= 2; - video_cfg->v_fc_config.timings.vfp /= 2; + video_cfg->v_fc_config.timings.vfront_porch /= 2; video_cfg->v_fc_config.timings.vsync_len /= 2; video_cfg->v_fc_config.timings.vbp /= 2; } @@ -373,7 +373,7 @@ static void hdmi_core_video_config(struct hdmi_core_data *core, /* set vertical sync offset */ REG_FLD_MOD(base, HDMI_CORE_FC_VSYNCINDELAY, - cfg->v_fc_config.timings.vfp, 7, 0); + cfg->v_fc_config.timings.vfront_porch, 7, 0); /* set horizontal sync pulse width */ REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINWIDTH1, |