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authorBen Skeggs <bskeggs@redhat.com>2013-07-05 10:26:20 +1000
committerBen Skeggs <bskeggs@redhat.com>2013-07-05 13:44:52 +1000
commitd196e16ebf8bc9489ee3dc41dc5dfd84a70cec18 (patch)
tree6dfd266b79ce92b5ec62a7452f2906071e2a6aa4 /drivers/gpu/drm/nouveau
parent0bfd6f734a99ce2c7217571c45c2456ae1da63c3 (diff)
downloadlinux-d196e16ebf8bc9489ee3dc41dc5dfd84a70cec18.tar.bz2
drm/nvc0-/gr: factor out yet more unknown magic into versioned functions
NVC1/NVD9 are the only chipsets that should have anything different happen on them after this. We previously weren't doing these register modifications, and NVIDIA do. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c7
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c12
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c1
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c1
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c9
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c1
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c20
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c1
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h4
9 files changed, 42 insertions, 14 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c
index 118b54b1b83f..b80723e7d49f 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c
@@ -901,6 +901,11 @@ nvc0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
}
void
+nvc0_grctx_generate_unkn(struct nvc0_graph_priv *priv)
+{
+}
+
+void
nvc0_grctx_generate_tpcid(struct nvc0_graph_priv *priv)
{
int gpc, tpc, id;
@@ -1060,6 +1065,7 @@ nvc0_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
nv_wr32(priv, 0x404154, 0x00000000);
oclass->mods(priv, info);
+ oclass->unkn(priv);
nvc0_grctx_generate_tpcid(priv);
nvc0_grctx_generate_r406028(priv);
@@ -1235,6 +1241,7 @@ nvc0_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nvc0_grctx_generate_main,
.mods = nvc0_grctx_generate_mods,
+ .unkn = nvc0_grctx_generate_unkn,
.hub = nvc0_grctx_init_hub,
.gpc = nvc0_grctx_init_gpc,
.icmd = nvc0_grctx_init_icmd,
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c
index b60dffab224f..e5be3ee7f172 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c
@@ -756,6 +756,17 @@ nvc1_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
}
}
+void
+nvc1_grctx_generate_unkn(struct nvc0_graph_priv *priv)
+{
+ nv_mask(priv, 0x418c6c, 0x00000001, 0x00000001);
+ nv_mask(priv, 0x41980c, 0x00000010, 0x00000010);
+ nv_mask(priv, 0x419814, 0x00000004, 0x00000004);
+ nv_mask(priv, 0x4064c0, 0x80000000, 0x80000000);
+ nv_mask(priv, 0x405800, 0x08000000, 0x08000000);
+ nv_mask(priv, 0x419c00, 0x00000008, 0x00000008);
+}
+
static struct nvc0_graph_init *
nvc1_grctx_init_hub[] = {
nvc0_grctx_init_base,
@@ -804,6 +815,7 @@ nvc1_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nvc0_grctx_generate_main,
.mods = nvc1_grctx_generate_mods,
+ .unkn = nvc1_grctx_generate_unkn,
.hub = nvc1_grctx_init_hub,
.gpc = nvc1_grctx_init_gpc,
.icmd = nvc1_grctx_init_icmd,
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c
index 56fa54719d2e..8f237b3bd8c6 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c
@@ -91,6 +91,7 @@ nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nvc0_grctx_generate_main,
.mods = nvc0_grctx_generate_mods,
+ .unkn = nvc0_grctx_generate_unkn,
.hub = nvc0_grctx_init_hub,
.gpc = nvc3_grctx_init_gpc,
.icmd = nvc0_grctx_init_icmd,
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c
index 2ba8ea81a63a..d0d4ce3c4892 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c
@@ -362,6 +362,7 @@ nvc8_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nvc0_grctx_generate_main,
.mods = nvc0_grctx_generate_mods,
+ .unkn = nvc0_grctx_generate_unkn,
.hub = nvc0_grctx_init_hub,
.gpc = nvc8_grctx_init_gpc,
.icmd = nvc8_grctx_init_icmd,
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c
index 25d5676eec47..36fa4da66abb 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c
@@ -227,13 +227,7 @@ nvd7_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
nv_wr32(priv, 0x404154, 0x00000000);
oclass->mods(priv, info);
-
- nv_wr32(priv, 0x418c6c, 0x1);
- nv_wr32(priv, 0x41980c, 0x10);
- nv_wr32(priv, 0x41be08, 0x4);
- nv_wr32(priv, 0x4064c0, 0x801a0078);
- nv_wr32(priv, 0x405800, 0xf8000bf);
- nv_wr32(priv, 0x419c00, 0xa);
+ oclass->unkn(priv);
nvc0_grctx_generate_tpcid(priv);
nvc0_grctx_generate_r406028(priv);
@@ -296,6 +290,7 @@ nvd7_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nvd7_grctx_generate_main,
.mods = nvd7_grctx_generate_mods,
+ .unkn = nve4_grctx_generate_unkn,
.hub = nvd7_grctx_init_hub,
.gpc = nvd7_grctx_init_gpc,
.icmd = nvd9_grctx_init_icmd,
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c
index e4eb91670ef2..818a4751df46 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c
@@ -507,6 +507,7 @@ nvd9_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nvc0_grctx_generate_main,
.mods = nvc1_grctx_generate_mods,
+ .unkn = nvc1_grctx_generate_unkn,
.hub = nvd9_grctx_init_hub,
.gpc = nvd9_grctx_init_gpc,
.icmd = nvd9_grctx_init_icmd,
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
index 261a600c8ffb..0b72d7240b0b 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
@@ -849,6 +849,17 @@ nve4_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
}
void
+nve4_grctx_generate_unkn(struct nvc0_graph_priv *priv)
+{
+ nv_mask(priv, 0x418c6c, 0x00000001, 0x00000001);
+ nv_mask(priv, 0x41980c, 0x00000010, 0x00000010);
+ nv_mask(priv, 0x41be08, 0x00000004, 0x00000004);
+ nv_mask(priv, 0x4064c0, 0x80000000, 0x80000000);
+ nv_mask(priv, 0x405800, 0x08000000, 0x08000000);
+ nv_mask(priv, 0x419c00, 0x00000008, 0x00000008);
+}
+
+void
nve4_grctx_generate_r418bb8(struct nvc0_graph_priv *priv)
{
u32 data[6] = {}, data2[2] = {};
@@ -922,13 +933,7 @@ nve4_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
nv_wr32(priv, 0x404154, 0x00000000);
oclass->mods(priv, info);
-
- nv_wr32(priv, 0x418c6c, 0x1);
- nv_wr32(priv, 0x41980c, 0x10);
- nv_wr32(priv, 0x41be08, 0x4);
- nv_wr32(priv, 0x4064c0, 0x801a00f0);
- nv_wr32(priv, 0x405800, 0xf8000bf);
- nv_wr32(priv, 0x419c00, 0xa);
+ oclass->unkn(priv);
nvc0_grctx_generate_tpcid(priv);
nvc0_grctx_generate_r406028(priv);
@@ -1013,6 +1018,7 @@ nve4_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nve4_grctx_generate_main,
.mods = nve4_grctx_generate_mods,
+ .unkn = nve4_grctx_generate_unkn,
.hub = nve4_grctx_init_hub,
.gpc = nve4_grctx_init_gpc,
.icmd = nve4_grctx_init_icmd,
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
index c1bacc3d7374..dcb2ebb8c29d 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
@@ -320,6 +320,7 @@ nvf0_grctx_oclass = &(struct nvc0_grctx_oclass) {
},
.main = nve4_grctx_generate_main,
.mods = nvf0_grctx_generate_mods,
+ .unkn = nve4_grctx_generate_unkn,
.hub = nvf0_grctx_init_hub,
.gpc = nvf0_grctx_init_gpc,
.icmd = nvc0_grctx_init_icmd,
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
index dd06674336b4..ea17a80ad7fc 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
@@ -150,6 +150,7 @@ struct nvc0_grctx_oclass {
void (*main)(struct nvc0_graph_priv *, struct nvc0_grctx *);
/* context-specific modify-on-first-load list generation function */
void (*mods)(struct nvc0_graph_priv *, struct nvc0_grctx *);
+ void (*unkn)(struct nvc0_graph_priv *);
/* mmio context data */
struct nvc0_graph_init **hub;
struct nvc0_graph_init **gpc;
@@ -207,6 +208,7 @@ extern struct nvc0_graph_init nve4_graph_init_unk88xx[];
int nvc0_grctx_generate(struct nvc0_graph_priv *);
void nvc0_grctx_generate_main(struct nvc0_graph_priv *, struct nvc0_grctx *);
void nvc0_grctx_generate_mods(struct nvc0_graph_priv *, struct nvc0_grctx *);
+void nvc0_grctx_generate_unkn(struct nvc0_graph_priv *);
void nvc0_grctx_generate_tpcid(struct nvc0_graph_priv *);
void nvc0_grctx_generate_r406028(struct nvc0_graph_priv *);
void nvc0_grctx_generate_r4060a8(struct nvc0_graph_priv *);
@@ -238,6 +240,7 @@ extern struct nvc0_graph_init nvc0_grctx_init_90c0[];
extern struct nvc0_graph_init nvc0_grctx_init_mthd_magic[];
void nvc1_grctx_generate_mods(struct nvc0_graph_priv *, struct nvc0_grctx *);
+void nvc1_grctx_generate_unkn(struct nvc0_graph_priv *);
extern struct nouveau_oclass *nvc1_grctx_oclass;
extern struct nvc0_graph_init nvc1_grctx_init_9097[];
@@ -254,6 +257,7 @@ extern struct nvc0_graph_init nvd9_grctx_init_rop[];
extern struct nvc0_graph_mthd nvd9_grctx_init_mthd[];
void nve4_grctx_generate_main(struct nvc0_graph_priv *, struct nvc0_grctx *);
+void nve4_grctx_generate_unkn(struct nvc0_graph_priv *);
extern struct nouveau_oclass *nve4_grctx_oclass;
extern struct nvc0_graph_init nve4_grctx_init_unk46xx[];
extern struct nvc0_graph_init nve4_grctx_init_unk47xx[];