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authorFrancisco Jerez <currojerez@riseup.net>2010-09-28 03:22:15 +0200
committerBen Skeggs <bskeggs@redhat.com>2010-10-05 09:58:33 +1000
commit23357e4da0e1b39c9dfd64a1db0deafc6d70b554 (patch)
tree1511f2a28dd3e9bc02f625b628acaefeb53aabd7 /drivers/gpu/drm/nouveau
parent2756a4f5df42bf19496ad7759032633ab826ea0e (diff)
downloadlinux-23357e4da0e1b39c9dfd64a1db0deafc6d70b554.tar.bz2
drm/nv30-nv40: Fix postdivider mask when writing engine/memory PLLs.
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_hw.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_hw.c b/drivers/gpu/drm/nouveau/nouveau_hw.c
index ebcf8a8190c2..bed669a54a2d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_hw.c
+++ b/drivers/gpu/drm/nouveau/nouveau_hw.c
@@ -305,7 +305,7 @@ setPLL_double_lowregs(struct drm_device *dev, uint32_t NMNMreg,
bool mpll = Preg == 0x4020;
uint32_t oldPval = nvReadMC(dev, Preg);
uint32_t NMNM = pv->NM2 << 16 | pv->NM1;
- uint32_t Pval = (oldPval & (mpll ? ~(0x11 << 16) : ~(1 << 16))) |
+ uint32_t Pval = (oldPval & (mpll ? ~(0x77 << 16) : ~(7 << 16))) |
0xc << 28 | pv->log2P << 16;
uint32_t saved4600 = 0;
/* some cards have different maskc040s */