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authorBen Skeggs <bskeggs@redhat.com>2020-12-04 16:11:29 +1000
committerBen Skeggs <bskeggs@redhat.com>2021-02-11 11:49:59 +1000
commitd1866250a22278859e1ec952ff62d2044ee37533 (patch)
tree8c884bdfa88f5fc22247141966b5534458cf4dc7 /drivers/gpu/drm/nouveau/nvkm
parent400c2a456ce4b89fd286f009dfad0429020ee834 (diff)
downloadlinux-d1866250a22278859e1ec952ff62d2044ee37533.tar.bz2
drm/nouveau/sec2: switch to instanced constructor
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm')
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/core/subdev.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/base.c23
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c4
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c5
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp108.c5
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c5
7 files changed, 23 insertions, 22 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c
index 4c14f53e722f..aa6a93ba32dd 100644
--- a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c
+++ b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c
@@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
#include <core/layout.h>
#undef NVKM_LAYOUT_ONCE
#undef NVKM_LAYOUT_INST
- [NVKM_ENGINE_SEC2 ] = "sec2",
[NVKM_ENGINE_SW ] = "sw",
[NVKM_ENGINE_VIC ] = "vic",
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 18db3d25612a..d5b5f9eb5082 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -2199,7 +2199,7 @@ nv132_chipset = {
.gr = { 0x00000001, gp102_gr_new },
.nvdec = { 0x00000001, gm107_nvdec_new },
.nvenc = { 0x00000003, gm107_nvenc_new },
- .sec2 = gp102_sec2_new,
+ .sec2 = { 0x00000001, gp102_sec2_new },
.sw = gf100_sw_new,
};
@@ -2233,7 +2233,7 @@ nv134_chipset = {
.gr = { 0x00000001, gp104_gr_new },
.nvdec = { 0x00000001, gm107_nvdec_new },
.nvenc = { 0x00000003, gm107_nvenc_new },
- .sec2 = gp102_sec2_new,
+ .sec2 = { 0x00000001, gp102_sec2_new },
.sw = gf100_sw_new,
};
@@ -2267,7 +2267,7 @@ nv136_chipset = {
.gr = { 0x00000001, gp104_gr_new },
.nvdec = { 0x00000001, gm107_nvdec_new },
.nvenc = { 0x00000001, gm107_nvenc_new },
- .sec2 = gp102_sec2_new,
+ .sec2 = { 0x00000001, gp102_sec2_new },
.sw = gf100_sw_new,
};
@@ -2301,7 +2301,7 @@ nv137_chipset = {
.gr = { 0x00000001, gp107_gr_new },
.nvdec = { 0x00000001, gm107_nvdec_new },
.nvenc = { 0x00000003, gm107_nvenc_new },
- .sec2 = gp102_sec2_new,
+ .sec2 = { 0x00000001, gp102_sec2_new },
.sw = gf100_sw_new,
};
@@ -2334,7 +2334,7 @@ nv138_chipset = {
.fifo = { 0x00000001, gp100_fifo_new },
.gr = { 0x00000001, gp108_gr_new },
.nvdec = { 0x00000001, gm107_nvdec_new },
- .sec2 = gp108_sec2_new,
+ .sec2 = { 0x00000001, gp108_sec2_new },
.sw = gf100_sw_new,
};
@@ -2393,7 +2393,7 @@ nv140_chipset = {
.gr = { 0x00000001, gv100_gr_new },
.nvdec = { 0x00000001, gm107_nvdec_new },
.nvenc = { 0x00000007, gm107_nvenc_new },
- .sec2 = gp108_sec2_new,
+ .sec2 = { 0x00000001, gp108_sec2_new },
};
static const struct nvkm_device_chip
@@ -2427,7 +2427,7 @@ nv162_chipset = {
.gr = { 0x00000001, tu102_gr_new },
.nvdec = { 0x00000001, gm107_nvdec_new },
.nvenc = { 0x00000001, gm107_nvenc_new },
- .sec2 = tu102_sec2_new,
+ .sec2 = { 0x00000001, tu102_sec2_new },
};
static const struct nvkm_device_chip
@@ -2461,7 +2461,7 @@ nv164_chipset = {
.gr = { 0x00000001, tu102_gr_new },
.nvdec = { 0x00000003, gm107_nvdec_new },
.nvenc = { 0x00000001, gm107_nvenc_new },
- .sec2 = tu102_sec2_new,
+ .sec2 = { 0x00000001, tu102_sec2_new },
};
static const struct nvkm_device_chip
@@ -2495,7 +2495,7 @@ nv166_chipset = {
.gr = { 0x00000001, tu102_gr_new },
.nvdec = { 0x00000007, gm107_nvdec_new },
.nvenc = { 0x00000001, gm107_nvenc_new },
- .sec2 = tu102_sec2_new,
+ .sec2 = { 0x00000001, tu102_sec2_new },
};
static const struct nvkm_device_chip
@@ -2529,7 +2529,7 @@ nv167_chipset = {
.gr = { 0x00000001, tu102_gr_new },
.nvdec = { 0x00000001, gm107_nvdec_new },
.nvenc = { 0x00000001, gm107_nvenc_new },
- .sec2 = tu102_sec2_new,
+ .sec2 = { 0x00000001, tu102_sec2_new },
};
static const struct nvkm_device_chip
@@ -2563,7 +2563,7 @@ nv168_chipset = {
.gr = { 0x00000001, tu102_gr_new },
.nvdec = { 0x00000001, gm107_nvdec_new },
.nvenc = { 0x00000001, gm107_nvenc_new },
- .sec2 = tu102_sec2_new,
+ .sec2 = { 0x00000001, tu102_sec2_new },
};
static const struct nvkm_device_chip
@@ -3162,7 +3162,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
- _(NVKM_ENGINE_SEC2 , sec2);
_(NVKM_ENGINE_SW , sw);
_(NVKM_ENGINE_VIC , vic);
case NVKM_ENGINE_CE1:
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c
index 27591b2caf74..092c6d0b8e01 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c
@@ -85,7 +85,7 @@ nvkm_sec2 = {
int
nvkm_sec2_new_(const struct nvkm_sec2_fwif *fwif, struct nvkm_device *device,
- int index, u32 addr, struct nvkm_sec2 **psec2)
+ enum nvkm_subdev_type type, int inst, u32 addr, struct nvkm_sec2 **psec2)
{
struct nvkm_sec2 *sec2;
int ret;
@@ -93,7 +93,7 @@ nvkm_sec2_new_(const struct nvkm_sec2_fwif *fwif, struct nvkm_device *device,
if (!(sec2 = *psec2 = kzalloc(sizeof(*sec2), GFP_KERNEL)))
return -ENOMEM;
- ret = nvkm_engine_ctor(&nvkm_sec2, device, index, true, &sec2->engine);
+ ret = nvkm_engine_ctor(&nvkm_sec2, device, type, inst, true, &sec2->engine);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c
index bccf7acb7f98..44e39f5743d5 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c
@@ -343,7 +343,8 @@ gp102_sec2_fwif[] = {
};
int
-gp102_sec2_new(struct nvkm_device *device, int index, struct nvkm_sec2 **psec2)
+gp102_sec2_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+ struct nvkm_sec2 **psec2)
{
- return nvkm_sec2_new_(gp102_sec2_fwif, device, index, 0, psec2);
+ return nvkm_sec2_new_(gp102_sec2_fwif, device, type, inst, 0, psec2);
}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp108.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp108.c
index e770c9497871..3e9f5c842f3c 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp108.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp108.c
@@ -36,7 +36,8 @@ gp108_sec2_fwif[] = {
};
int
-gp108_sec2_new(struct nvkm_device *device, int index, struct nvkm_sec2 **psec2)
+gp108_sec2_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+ struct nvkm_sec2 **psec2)
{
- return nvkm_sec2_new_(gp108_sec2_fwif, device, index, 0, psec2);
+ return nvkm_sec2_new_(gp108_sec2_fwif, device, type, inst, 0, psec2);
}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h
index 8cbc0b7d0a27..af19229e885d 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h
@@ -25,6 +25,6 @@ int gp102_sec2_load(struct nvkm_sec2 *, int, const struct nvkm_sec2_fwif *);
extern const struct nvkm_sec2_func gp102_sec2;
extern const struct nvkm_acr_lsf_func gp102_sec2_acr_1;
-int nvkm_sec2_new_(const struct nvkm_sec2_fwif *, struct nvkm_device *,
+int nvkm_sec2_new_(const struct nvkm_sec2_fwif *, struct nvkm_device *, enum nvkm_subdev_type,
int, u32 addr, struct nvkm_sec2 **);
#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c
index a231c1c6c0a5..f3faeb705575 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c
@@ -72,10 +72,11 @@ tu102_sec2_fwif[] = {
};
int
-tu102_sec2_new(struct nvkm_device *device, int index, struct nvkm_sec2 **psec2)
+tu102_sec2_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+ struct nvkm_sec2 **psec2)
{
/* TOP info wasn't updated on Turing to reflect the PRI
* address change for some reason. We override it here.
*/
- return nvkm_sec2_new_(tu102_sec2_fwif, device, index, 0x840000, psec2);
+ return nvkm_sec2_new_(tu102_sec2_fwif, device, type, inst, 0x840000, psec2);
}