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| author | Ben Skeggs <bskeggs@redhat.com> | 2022-06-01 20:48:14 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2022-11-09 10:45:12 +1000 |
| commit | 0c520ad45a65313c310fe96e17bda51e2c019ec4 (patch) | |
| tree | 8b25531182f86277e635672a6703c07fbc078ac7 /drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c | |
| parent | 9aa3faced0a3dea04294afe781e07e1ef1118e30 (diff) | |
| download | linux-0c520ad45a65313c310fe96e17bda51e2c019ec4.tar.bz2 | |
drm/nouveau/gr/gf117-: make ppc_nr[gpc] accurate
We're going to be pulling in a chunk of code from NVGPU to fixup our
SMID mappings on Volta and above, which depends on ppc_nr[gpc]
reflecting the actual number of PPCs present, not the maximum number.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c index c2e5d43b1c37..9975a4d5c058 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c @@ -75,7 +75,7 @@ gv100_grctx_generate_attrib(struct gf100_gr_chan *chan) gf100_grctx_patch_wr32(chan, 0x40585c, alpha); for (gpc = 0; gpc < gr->gpc_nr; gpc++) { - for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) { + for (ppc = 0; ppc < gr->func->ppc_nr; ppc++, n++) { const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; const u32 bs = attrib * gr->ppc_tpc_max; const u32 gs = gfxp * gr->ppc_tpc_max; |