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| author | Ben Skeggs <bskeggs@redhat.com> | 2015-08-20 14:54:10 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2015-08-28 12:40:17 +1000 |
| commit | 276836d46e535c8ca299a1ea8302879dbdd3e93a (patch) | |
| tree | 1d74d68b4998edf42bc88c667fe33388f988a603 /drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c | |
| parent | 8774440390cdfe37c5d003f850847c9fd67cdf61 (diff) | |
| download | linux-276836d46e535c8ca299a1ea8302879dbdd3e93a.tar.bz2 | |
drm/nouveau/gr: switch to device pri macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c index 91e4aacfdec7..252bcc331a5a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c @@ -28,6 +28,7 @@ static void gk20a_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) { + struct nvkm_device *device = gr->base.engine.subdev.device; struct gf100_grctx_oclass *oclass = (void *)nv_engine(gr)->cclass; int idle_timeout_save; int i; @@ -36,8 +37,8 @@ gk20a_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) gf100_gr_wait_idle(gr); - idle_timeout_save = nv_rd32(gr, 0x404154); - nv_wr32(gr, 0x404154, 0x00000000); + idle_timeout_save = nvkm_rd32(device, 0x404154); + nvkm_wr32(device, 0x404154, 0x00000000); oclass->attrib(info); @@ -49,17 +50,17 @@ gk20a_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) gf100_grctx_generate_r406800(gr); for (i = 0; i < 8; i++) - nv_wr32(gr, 0x4064d0 + (i * 0x04), 0x00000000); + nvkm_wr32(device, 0x4064d0 + (i * 0x04), 0x00000000); - nv_wr32(gr, 0x405b00, (gr->tpc_total << 8) | gr->gpc_nr); + nvkm_wr32(device, 0x405b00, (gr->tpc_total << 8) | gr->gpc_nr); gk104_grctx_generate_rop_active_fbps(gr); - nv_mask(gr, 0x5044b0, 0x8000000, 0x8000000); + nvkm_mask(device, 0x5044b0, 0x8000000, 0x8000000); gf100_gr_wait_idle(gr); - nv_wr32(gr, 0x404154, idle_timeout_save); + nvkm_wr32(device, 0x404154, idle_timeout_save); gf100_gr_wait_idle(gr); gf100_gr_mthd(gr, gr->fuc_method); |