diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2017-05-19 23:59:35 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2017-06-16 14:04:56 +1000 |
| commit | 7d1fede03c5880003a08ff080e6e41984902be46 (patch) | |
| tree | a33b80621bcc93b13408589e3961bfa43ac1242c /drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c | |
| parent | a1de2b522fef9fd725f2edb6989af68b8749acf5 (diff) | |
| download | linux-7d1fede03c5880003a08ff080e6e41984902be46.tar.bz2 | |
drm/nouveau/disp/g94-: port OR DP drive setting control to nvkm_ior
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c index fecaa03eeb94..2d8f93323309 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c @@ -73,9 +73,15 @@ static int nvkm_dp_train_drive(struct lt_state *lt, bool pc) { struct nvkm_dp *dp = lt->dp; + struct nvkm_ior *ior = dp->outp.ior; + struct nvkm_bios *bios = ior->disp->engine.subdev.device->bios; + struct nvbios_dpout info; + struct nvbios_dpcfg ocfg; + u8 ver, hdr, cnt, len; + u32 data; int ret, i; - for (i = 0; i < dp->outp.ior->dp.nr; i++) { + for (i = 0; i < ior->dp.nr; i++) { u8 lane = (lt->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf; u8 lpc2 = (lt->pc2stat >> (i * 2)) & 0x3; u8 lpre = (lane & 0x0c) >> 2; @@ -99,7 +105,21 @@ nvkm_dp_train_drive(struct lt_state *lt, bool pc) OUTP_TRACE(&dp->outp, "config lane %d %02x %02x", i, lt->conf[i], lpc2); - dp->func->drv_ctl(dp, i, lvsw & 3, lpre & 3, lpc2 & 3); + + data = nvbios_dpout_match(bios, dp->outp.info.hasht, + dp->outp.info.hashm, + &ver, &hdr, &cnt, &len, &info); + if (!data) + continue; + + data = nvbios_dpcfg_match(bios, data, lpc2 & 3, lvsw & 3, + lpre & 3, &ver, &hdr, &cnt, &len, + &ocfg); + if (!data) + continue; + + ior->func->dp.drive(ior, i, ocfg.pc, ocfg.dc, + ocfg.pe, ocfg.tx_pu); } ret = nvkm_wraux(dp->aux, DPCD_LC03(0), lt->conf, 4); |