diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-14 15:24:57 +1000 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-22 12:18:01 +1000 |
commit | 878da15adb5ddce57339b87685d8b4630e60085f (patch) | |
tree | c73584d6df66dfefaf3911fa1958416973ed6dc2 /drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c | |
parent | ccdfdf21899924ac43b47850147af572a8dfcaa6 (diff) | |
download | linux-878da15adb5ddce57339b87685d8b4630e60085f.tar.bz2 |
drm/nouveau/disp: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).
Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
A comparison of objdump disassemblies proves no code changes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c index 72a90c74506c..e4baae226379 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c @@ -113,7 +113,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; case 0x86: @@ -142,7 +142,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; case 0x92: @@ -171,7 +171,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; case 0x94: @@ -200,7 +200,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; case 0x96: @@ -229,7 +229,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; case 0x98: @@ -258,7 +258,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_SEC ] = &nv98_sec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; case 0xa0: @@ -287,7 +287,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nva0_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = gt200_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; case 0xaa: @@ -316,7 +316,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_SEC ] = &nv98_sec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; case 0xac: @@ -345,7 +345,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_SEC ] = &nv98_sec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; case 0xa3: @@ -376,7 +376,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nva3_pm_oclass; break; case 0xa5: @@ -406,7 +406,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nva3_pm_oclass; break; case 0xa8: @@ -436,7 +436,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nva3_pm_oclass; break; case 0xaf: @@ -466,7 +466,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; - device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; + device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nva3_pm_oclass; break; default: |