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authorAlexandre Courbot <acourbot@nvidia.com>2014-10-27 18:49:17 +0900
committerBen Skeggs <bskeggs@redhat.com>2014-12-02 15:43:59 +1000
commitc3a0c771e582a74a344fa9dd805662222f896181 (patch)
tree4374fe4b75818b907ab3c07bcdc9ec9e0e6325ed /drivers/gpu/drm/nouveau/nouveau_bo.h
parentc5d7ddf70a8445f711f5ab9ab92bd4f59f993262 (diff)
downloadlinux-c3a0c771e582a74a344fa9dd805662222f896181.tar.bz2
drm/nouveau: implement explicitly coherent BOs
Allow nouveau_bo_new() to recognize the TTM_PL_FLAG_UNCACHED flag, which means that we want the allocated BO to be perfectly coherent between the CPU and GPU. This is useful on non-coherent architectures for which we do not want to manually sync some rarely-accessed buffers: typically, fences and pushbuffers. A TTM BO allocated with the TTM_PL_FLAG_UNCACHED on a non-coherent architecture will be populated using the DMA API, and accesses to it performed using the coherent mapping performed by dma_alloc_coherent(). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_bo.h')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.h b/drivers/gpu/drm/nouveau/nouveau_bo.h
index 22d2c764d80b..0f8bbd48a0b9 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.h
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.h
@@ -13,6 +13,7 @@ struct nouveau_bo {
u32 valid_domains;
struct ttm_place placements[3];
struct ttm_place busy_placements[3];
+ bool force_coherent;
struct ttm_bo_kmap_obj kmap;
struct list_head head;