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authorTimur Tabi <ttabi@nvidia.com>2020-06-09 07:52:04 -0500
committerBen Skeggs <bskeggs@redhat.com>2020-07-24 18:50:47 +1000
commitb448a266cc4a2a960a65108a4a36d36c17cd74b2 (patch)
tree88ff2b2efec47c989f0b61b02efeafdb3db47976 /drivers/gpu/drm/nouveau/include
parent804f570502289f9ccb31660da8d041fa14af6c65 (diff)
downloadlinux-b448a266cc4a2a960a65108a4a36d36c17cd74b2.tar.bz2
drm/nouveau/nvfw: firmware structures should begin with nvfw_
Rename all structures that are used directly by firmware to have a nvfw_ prefix. This makes it easier to identify structures that have a fixed, specific layout. A future patch will define several more such structures, so it's important to be consistent now. Signed-off-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/include')
-rw-r--r--drivers/gpu/drm/nouveau/include/nvfw/pmu.h6
-rw-r--r--drivers/gpu/drm/nouveau/include/nvfw/sec2.h6
-rw-r--r--drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h10
3 files changed, 11 insertions, 11 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvfw/pmu.h b/drivers/gpu/drm/nouveau/include/nvfw/pmu.h
index 452ed7d03827..64a51e7c4543 100644
--- a/drivers/gpu/drm/nouveau/include/nvfw/pmu.h
+++ b/drivers/gpu/drm/nouveau/include/nvfw/pmu.h
@@ -25,7 +25,7 @@ struct nv_pmu_args {
#define NV_PMU_UNIT_ACR 0x0a
struct nv_pmu_init_msg {
- struct nv_falcon_msg hdr;
+ struct nvfw_falcon_msg hdr;
#define NV_PMU_INIT_MSG_INIT 0x00
u8 msg_type;
@@ -44,7 +44,7 @@ struct nv_pmu_init_msg {
};
struct nv_pmu_acr_cmd {
- struct nv_falcon_cmd hdr;
+ struct nvfw_falcon_cmd hdr;
#define NV_PMU_ACR_CMD_INIT_WPR_REGION 0x00
#define NV_PMU_ACR_CMD_BOOTSTRAP_FALCON 0x01
#define NV_PMU_ACR_CMD_BOOTSTRAP_MULTIPLE_FALCONS 0x03
@@ -52,7 +52,7 @@ struct nv_pmu_acr_cmd {
};
struct nv_pmu_acr_msg {
- struct nv_falcon_cmd hdr;
+ struct nvfw_falcon_cmd hdr;
u8 msg_type;
};
diff --git a/drivers/gpu/drm/nouveau/include/nvfw/sec2.h b/drivers/gpu/drm/nouveau/include/nvfw/sec2.h
index 03496558b775..9a37ad4179cb 100644
--- a/drivers/gpu/drm/nouveau/include/nvfw/sec2.h
+++ b/drivers/gpu/drm/nouveau/include/nvfw/sec2.h
@@ -13,7 +13,7 @@ struct nv_sec2_args {
#define NV_SEC2_UNIT_ACR 0x08
struct nv_sec2_init_msg {
- struct nv_falcon_msg hdr;
+ struct nvfw_falcon_msg hdr;
#define NV_SEC2_INIT_MSG_INIT 0x00
u8 msg_type;
@@ -34,13 +34,13 @@ struct nv_sec2_init_msg {
};
struct nv_sec2_acr_cmd {
- struct nv_falcon_cmd hdr;
+ struct nvfw_falcon_cmd hdr;
#define NV_SEC2_ACR_CMD_BOOTSTRAP_FALCON 0x00
u8 cmd_type;
};
struct nv_sec2_acr_msg {
- struct nv_falcon_cmd hdr;
+ struct nvfw_falcon_cmd hdr;
u8 msg_type;
};
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h b/drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
index daa8e4bfb6bf..3981cb106aae 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
@@ -31,21 +31,21 @@ int gp102_sec2_flcn_enable(struct nvkm_falcon *);
#define FLCN_ERR(f,fmt,a...) FLCN_PRINTK(error, (f), fmt, ##a)
/**
- * struct nv_falcon_msg - header for all messages
+ * struct nvfw_falcon_msg - header for all messages
*
* @unit_id: id of firmware process that sent the message
* @size: total size of message
* @ctrl_flags: control flags
* @seq_id: used to match a message from its corresponding command
*/
-struct nv_falcon_msg {
+struct nvfw_falcon_msg {
u8 unit_id;
u8 size;
u8 ctrl_flags;
u8 seq_id;
};
-#define nv_falcon_cmd nv_falcon_msg
+#define nvfw_falcon_cmd nvfw_falcon_msg
#define NV_FALCON_CMD_UNIT_ID_REWIND 0x00
struct nvkm_falcon_qmgr;
@@ -53,7 +53,7 @@ int nvkm_falcon_qmgr_new(struct nvkm_falcon *, struct nvkm_falcon_qmgr **);
void nvkm_falcon_qmgr_del(struct nvkm_falcon_qmgr **);
typedef int
-(*nvkm_falcon_qmgr_callback)(void *priv, struct nv_falcon_msg *);
+(*nvkm_falcon_qmgr_callback)(void *priv, struct nvfw_falcon_msg *);
struct nvkm_falcon_cmdq;
int nvkm_falcon_cmdq_new(struct nvkm_falcon_qmgr *, const char *name,
@@ -62,7 +62,7 @@ void nvkm_falcon_cmdq_del(struct nvkm_falcon_cmdq **);
void nvkm_falcon_cmdq_init(struct nvkm_falcon_cmdq *,
u32 index, u32 offset, u32 size);
void nvkm_falcon_cmdq_fini(struct nvkm_falcon_cmdq *);
-int nvkm_falcon_cmdq_send(struct nvkm_falcon_cmdq *, struct nv_falcon_cmd *,
+int nvkm_falcon_cmdq_send(struct nvkm_falcon_cmdq *, struct nvfw_falcon_cmd *,
nvkm_falcon_qmgr_callback, void *priv,
unsigned long timeout_jiffies);