diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2018-12-11 14:50:02 +1000 |
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committer | Ben Skeggs <bskeggs@redhat.com> | 2018-12-11 15:37:49 +1000 |
commit | 9d24907ccffefc45c7ae53dede30f5bba93a4245 (patch) | |
tree | 479dbf08dd93521db6e72644c25dc40587dbb06c /drivers/gpu/drm/nouveau/include | |
parent | a98a3c52f81d20d61b43d084ddb724ab55d32526 (diff) | |
download | linux-9d24907ccffefc45c7ae53dede30f5bba93a4245.tar.bz2 |
drm/nouveau/fifo/gv100: return work submission token in channel ctor args
The token will also contain runlist ID on Turing, so instead expose it as
an opaque value from NVKM so the client doesn't need to care.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/include')
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvif/class.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvif/clc36f.h | 19 |
2 files changed, 20 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h index 6db56bd7d67e..d60c0f023dbf 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/class.h +++ b/drivers/gpu/drm/nouveau/include/nvif/class.h @@ -68,7 +68,7 @@ #define KEPLER_CHANNEL_GPFIFO_B /* cla06f.h */ 0x0000a16f #define MAXWELL_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000b06f #define PASCAL_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000c06f -#define VOLTA_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000c36f +#define VOLTA_CHANNEL_GPFIFO_A /* clc36f.h */ 0x0000c36f #define NV50_DISP /* cl5070.h */ 0x00005070 #define G82_DISP /* cl5070.h */ 0x00008270 diff --git a/drivers/gpu/drm/nouveau/include/nvif/clc36f.h b/drivers/gpu/drm/nouveau/include/nvif/clc36f.h new file mode 100644 index 000000000000..6b14d7e3f6bb --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/clc36f.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __NVIF_CLC36F_H__ +#define __NVIF_CLC36F_H__ + +struct volta_channel_gpfifo_a_v0 { + __u8 version; + __u8 priv; + __u16 chid; + __u32 ilength; + __u64 ioffset; + __u64 runlist; + __u64 vmm; + __u64 inst; + __u32 token; +}; + +#define NVC36F_V0_NTFY_NON_STALL_INTERRUPT 0x00 +#define NVC36F_V0_NTFY_KILLED 0x01 +#endif |