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author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-14 00:04:21 +1000 |
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committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-22 12:17:43 +1000 |
commit | ebb58dc2ef8c62d1affa28160f57faa7b0e1dc02 (patch) | |
tree | 9611cc71197328f8c9887bce0fafd0ed4633c012 /drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h | |
parent | f3867f439fd610db0cbcf1bb739001e95b7b25c6 (diff) | |
download | linux-ebb58dc2ef8c62d1affa28160f57faa7b0e1dc02.tar.bz2 |
drm/nouveau/pmu: rename from pwr (no binary change)
Switch to NVIDIA's name for the device.
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).
Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
A comparison of objdump disassemblies proves no code changes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h')
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h new file mode 100644 index 000000000000..c890a4fb3cbb --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h @@ -0,0 +1,57 @@ +#ifndef __NOUVEAU_PMU_H__ +#define __NOUVEAU_PMU_H__ + +#include <core/subdev.h> +#include <core/device.h> + +struct nouveau_pmu { + struct nouveau_subdev base; + + struct { + u32 base; + u32 size; + } send; + + struct { + u32 base; + u32 size; + + struct work_struct work; + wait_queue_head_t wait; + u32 process; + u32 message; + u32 data[2]; + } recv; + + int (*message)(struct nouveau_pmu *, u32[2], u32, u32, u32, u32); + void (*pgob)(struct nouveau_pmu *, bool); +}; + +static inline struct nouveau_pmu * +nouveau_pmu(void *obj) +{ + return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_PMU); +} + +extern struct nouveau_oclass *nva3_pmu_oclass; +extern struct nouveau_oclass *nvc0_pmu_oclass; +extern struct nouveau_oclass *nvd0_pmu_oclass; +extern struct nouveau_oclass *gk104_pmu_oclass; +extern struct nouveau_oclass *nv108_pmu_oclass; +extern struct nouveau_oclass *gk20a_pmu_oclass; + +/* interface to MEMX process running on PMU */ +struct nouveau_memx; +int nouveau_memx_init(struct nouveau_pmu *, struct nouveau_memx **); +int nouveau_memx_fini(struct nouveau_memx **, bool exec); +void nouveau_memx_wr32(struct nouveau_memx *, u32 addr, u32 data); +void nouveau_memx_wait(struct nouveau_memx *, + u32 addr, u32 mask, u32 data, u32 nsec); +void nouveau_memx_nsec(struct nouveau_memx *, u32 nsec); +void nouveau_memx_wait_vblank(struct nouveau_memx *); +void nouveau_memx_train(struct nouveau_memx *); +int nouveau_memx_train_result(struct nouveau_pmu *, u32 *, int); +void nouveau_memx_block(struct nouveau_memx *); +void nouveau_memx_unblock(struct nouveau_memx *); + +#endif |