diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-13 22:13:14 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-22 12:15:10 +1000 |
| commit | c39f472e9f14e49a9bc091977ced0ec45fc00c57 (patch) | |
| tree | 75af3291cccda2482913cc0044888a8a86f4841b /drivers/gpu/drm/nouveau/include/nvkm/engine | |
| parent | 055a65d5987a7f246c3fc2297158286882dbdbcf (diff) | |
| download | linux-c39f472e9f14e49a9bc091977ced0ec45fc00c57.tar.bz2 | |
drm/nouveau: remove symlinks, move core/ to nvkm/ (no code changes)
The symlinks were annoying some people, and they're not used anywhere
else in the kernel tree. The include directory structure has been
changed so that symlinks aren't needed anymore.
NVKM has been moved from core/ to nvkm/ to make it more obvious as to
what the directory is for, and as some minor prep for when NVKM gets
split out into its own module (virt) at a later date.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/include/nvkm/engine')
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/bsp.h | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/copy.h | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/crypt.h | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/device.h | 33 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h | 36 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h | 31 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h | 83 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h | 126 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/graph.h | 86 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/mpeg.h | 63 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/perfmon.h | 38 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/ppp.h | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/software.h | 51 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/vp.h | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/xtensa.h | 38 |
15 files changed, 630 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/bsp.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/bsp.h new file mode 100644 index 000000000000..67662e2c4547 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/bsp.h @@ -0,0 +1,9 @@ +#ifndef __NOUVEAU_BSP_H__ +#define __NOUVEAU_BSP_H__ + +extern struct nouveau_oclass nv84_bsp_oclass; +extern struct nouveau_oclass nv98_bsp_oclass; +extern struct nouveau_oclass nvc0_bsp_oclass; +extern struct nouveau_oclass nve0_bsp_oclass; + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/copy.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/copy.h new file mode 100644 index 000000000000..316a28ae5f5c --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/copy.h @@ -0,0 +1,13 @@ +#ifndef __NOUVEAU_COPY_H__ +#define __NOUVEAU_COPY_H__ + +void nva3_copy_intr(struct nouveau_subdev *); + +extern struct nouveau_oclass nva3_copy_oclass; +extern struct nouveau_oclass nvc0_copy0_oclass; +extern struct nouveau_oclass nvc0_copy1_oclass; +extern struct nouveau_oclass nve0_copy0_oclass; +extern struct nouveau_oclass nve0_copy1_oclass; +extern struct nouveau_oclass nve0_copy2_oclass; + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/crypt.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/crypt.h new file mode 100644 index 000000000000..db975618e937 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/crypt.h @@ -0,0 +1,7 @@ +#ifndef __NOUVEAU_CRYPT_H__ +#define __NOUVEAU_CRYPT_H__ + +extern struct nouveau_oclass nv84_crypt_oclass; +extern struct nouveau_oclass nv98_crypt_oclass; + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/device.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/device.h new file mode 100644 index 000000000000..672d3c8f4145 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/device.h @@ -0,0 +1,33 @@ +#ifndef __NOUVEAU_SUBDEV_DEVICE_H__ +#define __NOUVEAU_SUBDEV_DEVICE_H__ + +#include <core/device.h> + +struct platform_device; + +enum nv_bus_type { + NOUVEAU_BUS_PCI, + NOUVEAU_BUS_PLATFORM, +}; + +#define nouveau_device_create(p,t,n,s,c,d,u) \ + nouveau_device_create_((void *)(p), (t), (n), (s), (c), (d), \ + sizeof(**u), (void **)u) + +int nouveau_device_create_(void *, enum nv_bus_type type, u64 name, + const char *sname, const char *cfg, const char *dbg, + int, void **); + +int nv04_identify(struct nouveau_device *); +int nv10_identify(struct nouveau_device *); +int nv20_identify(struct nouveau_device *); +int nv30_identify(struct nouveau_device *); +int nv40_identify(struct nouveau_device *); +int nv50_identify(struct nouveau_device *); +int nvc0_identify(struct nouveau_device *); +int nve0_identify(struct nouveau_device *); +int gm100_identify(struct nouveau_device *); + +struct nouveau_device *nouveau_device_find(u64 name); + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h new file mode 100644 index 000000000000..626508d8da40 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h @@ -0,0 +1,36 @@ +#ifndef __NOUVEAU_DISP_H__ +#define __NOUVEAU_DISP_H__ + +#include <core/object.h> +#include <core/engine.h> +#include <core/device.h> +#include <core/event.h> + +struct nouveau_disp { + struct nouveau_engine base; + + struct list_head outp; + + struct nvkm_event hpd; + struct nvkm_event vblank; +}; + +static inline struct nouveau_disp * +nouveau_disp(void *obj) +{ + return (void *)nouveau_engine(obj, NVDEV_ENGINE_DISP); +} + +extern struct nouveau_oclass *nv04_disp_oclass; +extern struct nouveau_oclass *nv50_disp_oclass; +extern struct nouveau_oclass *nv84_disp_oclass; +extern struct nouveau_oclass *nva0_disp_oclass; +extern struct nouveau_oclass *nv94_disp_oclass; +extern struct nouveau_oclass *nva3_disp_oclass; +extern struct nouveau_oclass *nvd0_disp_oclass; +extern struct nouveau_oclass *nve0_disp_oclass; +extern struct nouveau_oclass *nvf0_disp_oclass; +extern struct nouveau_oclass *gm107_disp_oclass; +extern struct nouveau_oclass *gm204_disp_oclass; + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h new file mode 100644 index 000000000000..1b283a7b78e6 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h @@ -0,0 +1,31 @@ +#ifndef __NOUVEAU_DMAOBJ_H__ +#define __NOUVEAU_DMAOBJ_H__ + +#include <core/object.h> +#include <core/engine.h> + +struct nouveau_gpuobj; + +struct nouveau_dmaobj { + struct nouveau_object base; + u32 target; + u32 access; + u64 start; + u64 limit; +}; + +struct nouveau_dmaeng { + struct nouveau_engine base; + + /* creates a "physical" dma object from a struct nouveau_dmaobj */ + int (*bind)(struct nouveau_dmaobj *dmaobj, + struct nouveau_object *parent, + struct nouveau_gpuobj **); +}; + +extern struct nouveau_oclass *nv04_dmaeng_oclass; +extern struct nouveau_oclass *nv50_dmaeng_oclass; +extern struct nouveau_oclass *nvc0_dmaeng_oclass; +extern struct nouveau_oclass *nvd0_dmaeng_oclass; + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h new file mode 100644 index 000000000000..181aa7da524d --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h @@ -0,0 +1,83 @@ +#ifndef __NOUVEAU_FALCON_H__ +#define __NOUVEAU_FALCON_H__ + +#include <core/engine.h> +#include <core/engctx.h> +#include <core/gpuobj.h> + +struct nouveau_falcon_chan { + struct nouveau_engctx base; +}; + +#define nouveau_falcon_context_create(p,e,c,g,s,a,f,d) \ + nouveau_engctx_create((p), (e), (c), (g), (s), (a), (f), (d)) +#define nouveau_falcon_context_destroy(d) \ + nouveau_engctx_destroy(&(d)->base) +#define nouveau_falcon_context_init(d) \ + nouveau_engctx_init(&(d)->base) +#define nouveau_falcon_context_fini(d,s) \ + nouveau_engctx_fini(&(d)->base, (s)) + +#define _nouveau_falcon_context_ctor _nouveau_engctx_ctor +#define _nouveau_falcon_context_dtor _nouveau_engctx_dtor +#define _nouveau_falcon_context_init _nouveau_engctx_init +#define _nouveau_falcon_context_fini _nouveau_engctx_fini +#define _nouveau_falcon_context_rd32 _nouveau_engctx_rd32 +#define _nouveau_falcon_context_wr32 _nouveau_engctx_wr32 + +struct nouveau_falcon_data { + bool external; +}; + +struct nouveau_falcon { + struct nouveau_engine base; + + u32 addr; + u8 version; + u8 secret; + + struct nouveau_gpuobj *core; + bool external; + + struct { + u32 limit; + u32 *data; + u32 size; + } code; + + struct { + u32 limit; + u32 *data; + u32 size; + } data; +}; + +#define nv_falcon(priv) (&(priv)->base) + +#define nouveau_falcon_create(p,e,c,b,d,i,f,r) \ + nouveau_falcon_create_((p), (e), (c), (b), (d), (i), (f), \ + sizeof(**r),(void **)r) +#define nouveau_falcon_destroy(p) \ + nouveau_engine_destroy(&(p)->base) +#define nouveau_falcon_init(p) ({ \ + struct nouveau_falcon *falcon = (p); \ + _nouveau_falcon_init(nv_object(falcon)); \ +}) +#define nouveau_falcon_fini(p,s) ({ \ + struct nouveau_falcon *falcon = (p); \ + _nouveau_falcon_fini(nv_object(falcon), (s)); \ +}) + +int nouveau_falcon_create_(struct nouveau_object *, struct nouveau_object *, + struct nouveau_oclass *, u32, bool, const char *, + const char *, int, void **); + +void nouveau_falcon_intr(struct nouveau_subdev *subdev); + +#define _nouveau_falcon_dtor _nouveau_engine_dtor +int _nouveau_falcon_init(struct nouveau_object *); +int _nouveau_falcon_fini(struct nouveau_object *, bool); +u32 _nouveau_falcon_rd32(struct nouveau_object *, u64); +void _nouveau_falcon_wr32(struct nouveau_object *, u64, u32); + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h new file mode 100644 index 000000000000..27f05de8fd0a --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h @@ -0,0 +1,126 @@ +#ifndef __NOUVEAU_FIFO_H__ +#define __NOUVEAU_FIFO_H__ + +#include <core/namedb.h> +#include <core/gpuobj.h> +#include <core/engine.h> +#include <core/event.h> + +struct nouveau_fifo_chan { + struct nouveau_namedb namedb; + struct nouveau_dmaobj *pushdma; + struct nouveau_gpuobj *pushgpu; + void __iomem *user; + u64 addr; + u32 size; + u16 chid; + atomic_t refcnt; /* NV04_NVSW_SET_REF */ +}; + +static inline struct nouveau_fifo_chan * +nouveau_fifo_chan(void *obj) +{ + return (void *)nv_namedb(obj); +} + +#define nouveau_fifo_channel_create(p,e,c,b,a,s,n,m,d) \ + nouveau_fifo_channel_create_((p), (e), (c), (b), (a), (s), (n), \ + (m), sizeof(**d), (void **)d) +#define nouveau_fifo_channel_init(p) \ + nouveau_namedb_init(&(p)->namedb) +#define nouveau_fifo_channel_fini(p,s) \ + nouveau_namedb_fini(&(p)->namedb, (s)) + +int nouveau_fifo_channel_create_(struct nouveau_object *, + struct nouveau_object *, + struct nouveau_oclass *, + int bar, u32 addr, u32 size, u32 push, + u64 engmask, int len, void **); +void nouveau_fifo_channel_destroy(struct nouveau_fifo_chan *); + +#define _nouveau_fifo_channel_init _nouveau_namedb_init +#define _nouveau_fifo_channel_fini _nouveau_namedb_fini + +void _nouveau_fifo_channel_dtor(struct nouveau_object *); +int _nouveau_fifo_channel_map(struct nouveau_object *, u64 *, u32 *); +u32 _nouveau_fifo_channel_rd32(struct nouveau_object *, u64); +void _nouveau_fifo_channel_wr32(struct nouveau_object *, u64, u32); +int _nouveau_fifo_channel_ntfy(struct nouveau_object *, u32, struct nvkm_event **); + +struct nouveau_fifo_base { + struct nouveau_gpuobj gpuobj; +}; + +#define nouveau_fifo_context_create(p,e,c,g,s,a,f,d) \ + nouveau_gpuobj_create((p), (e), (c), 0, (g), (s), (a), (f), (d)) +#define nouveau_fifo_context_destroy(p) \ + nouveau_gpuobj_destroy(&(p)->gpuobj) +#define nouveau_fifo_context_init(p) \ + nouveau_gpuobj_init(&(p)->gpuobj) +#define nouveau_fifo_context_fini(p,s) \ + nouveau_gpuobj_fini(&(p)->gpuobj, (s)) + +#define _nouveau_fifo_context_dtor _nouveau_gpuobj_dtor +#define _nouveau_fifo_context_init _nouveau_gpuobj_init +#define _nouveau_fifo_context_fini _nouveau_gpuobj_fini +#define _nouveau_fifo_context_rd32 _nouveau_gpuobj_rd32 +#define _nouveau_fifo_context_wr32 _nouveau_gpuobj_wr32 + +struct nouveau_fifo { + struct nouveau_engine base; + + struct nvkm_event cevent; /* channel creation event */ + struct nvkm_event uevent; /* async user trigger */ + + struct nouveau_object **channel; + spinlock_t lock; + u16 min; + u16 max; + + int (*chid)(struct nouveau_fifo *, struct nouveau_object *); + void (*pause)(struct nouveau_fifo *, unsigned long *); + void (*start)(struct nouveau_fifo *, unsigned long *); +}; + +static inline struct nouveau_fifo * +nouveau_fifo(void *obj) +{ + return (void *)nouveau_engine(obj, NVDEV_ENGINE_FIFO); +} + +#define nouveau_fifo_create(o,e,c,fc,lc,d) \ + nouveau_fifo_create_((o), (e), (c), (fc), (lc), sizeof(**d), (void **)d) +#define nouveau_fifo_init(p) \ + nouveau_engine_init(&(p)->base) +#define nouveau_fifo_fini(p,s) \ + nouveau_engine_fini(&(p)->base, (s)) + +int nouveau_fifo_create_(struct nouveau_object *, struct nouveau_object *, + struct nouveau_oclass *, int min, int max, + int size, void **); +void nouveau_fifo_destroy(struct nouveau_fifo *); +const char * +nouveau_client_name_for_fifo_chid(struct nouveau_fifo *fifo, u32 chid); + +#define _nouveau_fifo_init _nouveau_engine_init +#define _nouveau_fifo_fini _nouveau_engine_fini + +extern struct nouveau_oclass *nv04_fifo_oclass; +extern struct nouveau_oclass *nv10_fifo_oclass; +extern struct nouveau_oclass *nv17_fifo_oclass; +extern struct nouveau_oclass *nv40_fifo_oclass; +extern struct nouveau_oclass *nv50_fifo_oclass; +extern struct nouveau_oclass *nv84_fifo_oclass; +extern struct nouveau_oclass *nvc0_fifo_oclass; +extern struct nouveau_oclass *nve0_fifo_oclass; +extern struct nouveau_oclass *gk20a_fifo_oclass; +extern struct nouveau_oclass *nv108_fifo_oclass; + +int nouveau_fifo_uevent_ctor(struct nouveau_object *, void *, u32, + struct nvkm_notify *); +void nouveau_fifo_uevent(struct nouveau_fifo *); + +void nv04_fifo_intr(struct nouveau_subdev *); +int nv04_fifo_context_attach(struct nouveau_object *, struct nouveau_object *); + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/graph.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/graph.h new file mode 100644 index 000000000000..d61dcb7d6d5f --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/graph.h @@ -0,0 +1,86 @@ +#ifndef __NOUVEAU_GRAPH_H__ +#define __NOUVEAU_GRAPH_H__ + +#include <core/engine.h> +#include <core/engctx.h> +#include <core/enum.h> + +struct nouveau_graph_chan { + struct nouveau_engctx base; +}; + +#define nouveau_graph_context_create(p,e,c,g,s,a,f,d) \ + nouveau_engctx_create((p), (e), (c), (g), (s), (a), (f), (d)) +#define nouveau_graph_context_destroy(d) \ + nouveau_engctx_destroy(&(d)->base) +#define nouveau_graph_context_init(d) \ + nouveau_engctx_init(&(d)->base) +#define nouveau_graph_context_fini(d,s) \ + nouveau_engctx_fini(&(d)->base, (s)) + +#define _nouveau_graph_context_dtor _nouveau_engctx_dtor +#define _nouveau_graph_context_init _nouveau_engctx_init +#define _nouveau_graph_context_fini _nouveau_engctx_fini +#define _nouveau_graph_context_rd32 _nouveau_engctx_rd32 +#define _nouveau_graph_context_wr32 _nouveau_engctx_wr32 + +struct nouveau_graph { + struct nouveau_engine base; + + /* Returns chipset-specific counts of units packed into an u64. + */ + u64 (*units)(struct nouveau_graph *); +}; + +static inline struct nouveau_graph * +nouveau_graph(void *obj) +{ + return (void *)nouveau_engine(obj, NVDEV_ENGINE_GR); +} + +#define nouveau_graph_create(p,e,c,y,d) \ + nouveau_engine_create((p), (e), (c), (y), "PGRAPH", "graphics", (d)) +#define nouveau_graph_destroy(d) \ + nouveau_engine_destroy(&(d)->base) +#define nouveau_graph_init(d) \ + nouveau_engine_init(&(d)->base) +#define nouveau_graph_fini(d,s) \ + nouveau_engine_fini(&(d)->base, (s)) + +#define _nouveau_graph_dtor _nouveau_engine_dtor +#define _nouveau_graph_init _nouveau_engine_init +#define _nouveau_graph_fini _nouveau_engine_fini + +extern struct nouveau_oclass nv04_graph_oclass; +extern struct nouveau_oclass nv10_graph_oclass; +extern struct nouveau_oclass nv20_graph_oclass; +extern struct nouveau_oclass nv25_graph_oclass; +extern struct nouveau_oclass nv2a_graph_oclass; +extern struct nouveau_oclass nv30_graph_oclass; +extern struct nouveau_oclass nv34_graph_oclass; +extern struct nouveau_oclass nv35_graph_oclass; +extern struct nouveau_oclass nv40_graph_oclass; +extern struct nouveau_oclass nv50_graph_oclass; +extern struct nouveau_oclass *nvc0_graph_oclass; +extern struct nouveau_oclass *nvc1_graph_oclass; +extern struct nouveau_oclass *nvc4_graph_oclass; +extern struct nouveau_oclass *nvc8_graph_oclass; +extern struct nouveau_oclass *nvd7_graph_oclass; +extern struct nouveau_oclass *nvd9_graph_oclass; +extern struct nouveau_oclass *nve4_graph_oclass; +extern struct nouveau_oclass *gk20a_graph_oclass; +extern struct nouveau_oclass *nvf0_graph_oclass; +extern struct nouveau_oclass *gk110b_graph_oclass; +extern struct nouveau_oclass *nv108_graph_oclass; +extern struct nouveau_oclass *gm107_graph_oclass; + +extern const struct nouveau_bitfield nv04_graph_nsource[]; +extern struct nouveau_ofuncs nv04_graph_ofuncs; +bool nv04_graph_idle(void *obj); + +extern const struct nouveau_bitfield nv10_graph_intr_name[]; +extern const struct nouveau_bitfield nv10_graph_nstatus[]; + +extern const struct nouveau_enum nv50_data_error_names[]; + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/mpeg.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/mpeg.h new file mode 100644 index 000000000000..9b0d938199f6 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/mpeg.h @@ -0,0 +1,63 @@ +#ifndef __NOUVEAU_MPEG_H__ +#define __NOUVEAU_MPEG_H__ + +#include <core/engine.h> +#include <core/engctx.h> + +struct nouveau_mpeg_chan { + struct nouveau_engctx base; +}; + +#define nouveau_mpeg_context_create(p,e,c,g,s,a,f,d) \ + nouveau_engctx_create((p), (e), (c), (g), (s), (a), (f), (d)) +#define nouveau_mpeg_context_destroy(d) \ + nouveau_engctx_destroy(&(d)->base) +#define nouveau_mpeg_context_init(d) \ + nouveau_engctx_init(&(d)->base) +#define nouveau_mpeg_context_fini(d,s) \ + nouveau_engctx_fini(&(d)->base, (s)) + +#define _nouveau_mpeg_context_dtor _nouveau_engctx_dtor +#define _nouveau_mpeg_context_init _nouveau_engctx_init +#define _nouveau_mpeg_context_fini _nouveau_engctx_fini +#define _nouveau_mpeg_context_rd32 _nouveau_engctx_rd32 +#define _nouveau_mpeg_context_wr32 _nouveau_engctx_wr32 + +struct nouveau_mpeg { + struct nouveau_engine base; +}; + +#define nouveau_mpeg_create(p,e,c,d) \ + nouveau_engine_create((p), (e), (c), true, "PMPEG", "mpeg", (d)) +#define nouveau_mpeg_destroy(d) \ + nouveau_engine_destroy(&(d)->base) +#define nouveau_mpeg_init(d) \ + nouveau_engine_init(&(d)->base) +#define nouveau_mpeg_fini(d,s) \ + nouveau_engine_fini(&(d)->base, (s)) + +#define _nouveau_mpeg_dtor _nouveau_engine_dtor +#define _nouveau_mpeg_init _nouveau_engine_init +#define _nouveau_mpeg_fini _nouveau_engine_fini + +extern struct nouveau_oclass nv31_mpeg_oclass; +extern struct nouveau_oclass nv40_mpeg_oclass; +extern struct nouveau_oclass nv44_mpeg_oclass; +extern struct nouveau_oclass nv50_mpeg_oclass; +extern struct nouveau_oclass nv84_mpeg_oclass; +extern struct nouveau_ofuncs nv31_mpeg_ofuncs; +extern struct nouveau_oclass nv31_mpeg_cclass; +extern struct nouveau_oclass nv31_mpeg_sclass[]; +extern struct nouveau_oclass nv40_mpeg_sclass[]; +void nv31_mpeg_intr(struct nouveau_subdev *); +void nv31_mpeg_tile_prog(struct nouveau_engine *, int); +int nv31_mpeg_init(struct nouveau_object *); + +extern struct nouveau_ofuncs nv50_mpeg_ofuncs; +int nv50_mpeg_context_ctor(struct nouveau_object *, struct nouveau_object *, + struct nouveau_oclass *, void *, u32, + struct nouveau_object **); +void nv50_mpeg_intr(struct nouveau_subdev *); +int nv50_mpeg_init(struct nouveau_object *); + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/perfmon.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/perfmon.h new file mode 100644 index 000000000000..251c8545ca58 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/perfmon.h @@ -0,0 +1,38 @@ +#ifndef __NVKM_PERFMON_H__ +#define __NVKM_PERFMON_H__ + +#include <core/device.h> +#include <core/engine.h> +#include <core/engctx.h> + +struct nouveau_perfdom; +struct nouveau_perfctr; +struct nouveau_perfmon { + struct nouveau_engine base; + + struct nouveau_perfctx *context; + void *profile_data; + + struct list_head domains; + u32 sequence; + + /*XXX: temp for daemon backend */ + u32 pwr[8]; + u32 last; +}; + +static inline struct nouveau_perfmon * +nouveau_perfmon(void *obj) +{ + return (void *)nouveau_engine(obj, NVDEV_ENGINE_PERFMON); +} + +extern struct nouveau_oclass *nv40_perfmon_oclass; +extern struct nouveau_oclass *nv50_perfmon_oclass; +extern struct nouveau_oclass *nv84_perfmon_oclass; +extern struct nouveau_oclass *nva3_perfmon_oclass; +extern struct nouveau_oclass nvc0_perfmon_oclass; +extern struct nouveau_oclass nve0_perfmon_oclass; +extern struct nouveau_oclass nvf0_perfmon_oclass; + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/ppp.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/ppp.h new file mode 100644 index 000000000000..0a66781e8cf1 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/ppp.h @@ -0,0 +1,7 @@ +#ifndef __NOUVEAU_PPP_H__ +#define __NOUVEAU_PPP_H__ + +extern struct nouveau_oclass nv98_ppp_oclass; +extern struct nouveau_oclass nvc0_ppp_oclass; + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/software.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/software.h new file mode 100644 index 000000000000..23a462b50d03 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/software.h @@ -0,0 +1,51 @@ +#ifndef __NOUVEAU_SOFTWARE_H__ +#define __NOUVEAU_SOFTWARE_H__ + +#include <core/engine.h> +#include <core/engctx.h> + +struct nouveau_software_chan { + struct nouveau_engctx base; + + int (*flip)(void *); + void *flip_data; +}; + +#define nouveau_software_context_create(p,e,c,d) \ + nouveau_engctx_create((p), (e), (c), (p), 0, 0, 0, (d)) +#define nouveau_software_context_destroy(d) \ + nouveau_engctx_destroy(&(d)->base) +#define nouveau_software_context_init(d) \ + nouveau_engctx_init(&(d)->base) +#define nouveau_software_context_fini(d,s) \ + nouveau_engctx_fini(&(d)->base, (s)) + +#define _nouveau_software_context_dtor _nouveau_engctx_dtor +#define _nouveau_software_context_init _nouveau_engctx_init +#define _nouveau_software_context_fini _nouveau_engctx_fini + +struct nouveau_software { + struct nouveau_engine base; +}; + +#define nouveau_software_create(p,e,c,d) \ + nouveau_engine_create((p), (e), (c), true, "SW", "software", (d)) +#define nouveau_software_destroy(d) \ + nouveau_engine_destroy(&(d)->base) +#define nouveau_software_init(d) \ + nouveau_engine_init(&(d)->base) +#define nouveau_software_fini(d,s) \ + nouveau_engine_fini(&(d)->base, (s)) + +#define _nouveau_software_dtor _nouveau_engine_dtor +#define _nouveau_software_init _nouveau_engine_init +#define _nouveau_software_fini _nouveau_engine_fini + +extern struct nouveau_oclass *nv04_software_oclass; +extern struct nouveau_oclass *nv10_software_oclass; +extern struct nouveau_oclass *nv50_software_oclass; +extern struct nouveau_oclass *nvc0_software_oclass; + +void nv04_software_intr(struct nouveau_subdev *); + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/vp.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/vp.h new file mode 100644 index 000000000000..39baebec7fbb --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/vp.h @@ -0,0 +1,9 @@ +#ifndef __NOUVEAU_VP_H__ +#define __NOUVEAU_VP_H__ + +extern struct nouveau_oclass nv84_vp_oclass; +extern struct nouveau_oclass nv98_vp_oclass; +extern struct nouveau_oclass nvc0_vp_oclass; +extern struct nouveau_oclass nve0_vp_oclass; + +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/xtensa.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/xtensa.h new file mode 100644 index 000000000000..306100f31f02 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/xtensa.h @@ -0,0 +1,38 @@ +#ifndef __NOUVEAU_XTENSA_H__ +#define __NOUVEAU_XTENSA_H__ + +#include <core/engine.h> +#include <core/engctx.h> +#include <core/gpuobj.h> + +struct nouveau_xtensa { + struct nouveau_engine base; + + u32 addr; + struct nouveau_gpuobj *gpu_fw; + u32 fifo_val; + u32 unkd28; +}; + +#define nouveau_xtensa_create(p,e,c,b,d,i,f,r) \ + nouveau_xtensa_create_((p), (e), (c), (b), (d), (i), (f), \ + sizeof(**r),(void **)r) + +int _nouveau_xtensa_engctx_ctor(struct nouveau_object *, + struct nouveau_object *, + struct nouveau_oclass *, void *, u32, + struct nouveau_object **); + +void _nouveau_xtensa_intr(struct nouveau_subdev *); +int nouveau_xtensa_create_(struct nouveau_object *, + struct nouveau_object *, + struct nouveau_oclass *, u32, bool, + const char *, const char *, + int, void **); +#define _nouveau_xtensa_dtor _nouveau_engine_dtor +int _nouveau_xtensa_init(struct nouveau_object *); +int _nouveau_xtensa_fini(struct nouveau_object *, bool); +u32 _nouveau_xtensa_rd32(struct nouveau_object *, u64); +void _nouveau_xtensa_wr32(struct nouveau_object *, u64, u32); + +#endif |