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authorBen Skeggs <bskeggs@redhat.com>2015-01-14 15:36:34 +1000
committerBen Skeggs <bskeggs@redhat.com>2015-01-22 12:18:07 +1000
commitbe83cd4ef9a2a56bd35550bf96146b7b837daf02 (patch)
tree7cd92cdbb6c9fa473f4b896e8bd22e9dc8cbc28e /drivers/gpu/drm/nouveau/dispnv04/crtc.c
parent9719047b4d985ca7a46819956047cca04213d63e (diff)
downloadlinux-be83cd4ef9a2a56bd35550bf96146b7b837daf02.tar.bz2
drm/nouveau: finalise nvkm namespace switch (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/dispnv04/crtc.c')
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/crtc.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
index f32eecbe3c95..542bb266a0ab 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
@@ -112,12 +112,12 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod
{
struct drm_device *dev = crtc->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
- struct nouveau_bios *bios = nvxx_bios(&drm->device);
- struct nouveau_clk *clk = nvxx_clk(&drm->device);
+ struct nvkm_bios *bios = nvxx_bios(&drm->device);
+ struct nvkm_clk *clk = nvxx_clk(&drm->device);
struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;
struct nv04_crtc_reg *regp = &state->crtc_reg[nv_crtc->index];
- struct nouveau_pll_vals *pv = &regp->pllvals;
+ struct nvkm_pll_vals *pv = &regp->pllvals;
struct nvbios_pll pll_lim;
if (nvbios_pll_parse(bios, nv_crtc->index ? PLL_VPLL1 : PLL_VPLL0,