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| author | Archit Taneja <architt@codeaurora.org> | 2016-05-07 23:11:25 +0530 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2016-07-16 10:08:51 -0400 |
| commit | 990a40079a55b81b5b6aef91a24aa053fb370072 (patch) | |
| tree | e5dd69f557661d99cb4f48ac6cfee7f9cc513428 /drivers/gpu/drm/msm/msm_kms.h | |
| parent | a2b3a5571f386e23b56164396292675bac6f2a19 (diff) | |
| download | linux-990a40079a55b81b5b6aef91a24aa053fb370072.tar.bz2 | |
drm/msm/mdp5: Add MDSS top level driver
SoCs that contain MDP5 have a top level wrapper called MDSS that manages
clocks, power and irq for the sub-blocks within it.
Currently, the MDSS portions are stuffed into the MDP5 driver. This makes
it hard to represent the DT bindings in the correct way. We create a top
level MDSS helper that handles these parts. This is essentially moving out
some of the mdp5_kms irq code and MDSS register space and keeping it as a
separate entity. We haven't given any clocks to the top level MDSS yet,
but a AHB clock would be added in the future to access registers.
One thing to note is that the resources allocated by this helper are
tied to the top level platform_device (the one that allocates the
drm_device struct too). This device would be the parent to MDSS
sub-blocks like MDP5, DSI, eDP etc.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_kms.h')
| -rw-r--r-- | drivers/gpu/drm/msm/msm_kms.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h index 0452856355c1..40e41e5cdbc6 100644 --- a/drivers/gpu/drm/msm/msm_kms.h +++ b/drivers/gpu/drm/msm/msm_kms.h @@ -73,5 +73,7 @@ static inline void msm_kms_init(struct msm_kms *kms, struct msm_kms *mdp4_kms_init(struct drm_device *dev); struct msm_kms *mdp5_kms_init(struct drm_device *dev); +int msm_mdss_init(struct drm_device *dev); +void msm_mdss_destroy(struct drm_device *dev); #endif /* __MSM_KMS_H__ */ |