diff options
| author | Rob Clark <robdclark@chromium.org> | 2022-04-11 14:58:31 -0700 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2022-04-21 15:03:11 -0700 |
| commit | f9d5355fa5b6b25c3b6e1727bc36d11bb8c8ee24 (patch) | |
| tree | a892b1358d3a5e7cd99581bf7b6d9e9d71a75bcc /drivers/gpu/drm/msm/msm_gpu.c | |
| parent | 695383a1386c57ea723ff54ea99f49222deed3fd (diff) | |
| download | linux-f9d5355fa5b6b25c3b6e1727bc36d11bb8c8ee24.tar.bz2 | |
drm/msm/gpu: Drop duplicate fence counter
The ring seqno counter duplicates the fence-context last_fence counter.
They end up getting incremented in lock-step, on the same scheduler
thread, but the split just makes things less obvious.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Link: https://lore.kernel.org/r/20220411215849.297838-3-robdclark@gmail.com
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_gpu.c')
| -rw-r--r-- | drivers/gpu/drm/msm/msm_gpu.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index f292b70c1e6d..32ffe1c0e82c 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -523,7 +523,7 @@ static void hangcheck_handler(struct timer_list *t) if (fence != ring->hangcheck_fence) { /* some progress has been made.. ya! */ ring->hangcheck_fence = fence; - } else if (fence_before(fence, ring->seqno)) { + } else if (fence_before(fence, ring->fctx->last_fence)) { /* no progress and not done.. hung! */ ring->hangcheck_fence = fence; DRM_DEV_ERROR(dev->dev, "%s: hangcheck detected gpu lockup rb %d!\n", @@ -531,13 +531,13 @@ static void hangcheck_handler(struct timer_list *t) DRM_DEV_ERROR(dev->dev, "%s: completed fence: %u\n", gpu->name, fence); DRM_DEV_ERROR(dev->dev, "%s: submitted fence: %u\n", - gpu->name, ring->seqno); + gpu->name, ring->fctx->last_fence); kthread_queue_work(gpu->worker, &gpu->recover_work); } /* if still more pending work, reset the hangcheck timer: */ - if (fence_after(ring->seqno, ring->hangcheck_fence)) + if (fence_after(ring->fctx->last_fence, ring->hangcheck_fence)) hangcheck_timer_reset(gpu); /* workaround for missing irq: */ @@ -754,7 +754,7 @@ void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) msm_gpu_hw_init(gpu); - submit->seqno = ++ring->seqno; + submit->seqno = submit->hw_fence->seqno; msm_rd_dump_submit(priv->rd, submit, NULL); |