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authorRob Clark <robdclark@chromium.org>2021-07-27 18:06:12 -0700
committerRob Clark <robdclark@chromium.org>2021-07-27 18:09:18 -0700
commita61acbbe9cf873f869fc634ae6f72f214f5994cc (patch)
tree1c4533b31c383fda8359250d5a967cccdec8d98e /drivers/gpu/drm/msm/msm_gem_submit.c
parentbe40596bb5cf20cf9eaeddeeb57de7c4f570c886 (diff)
downloadlinux-a61acbbe9cf873f869fc634ae6f72f214f5994cc.tar.bz2
drm/msm: Track "seqno" fences by idr
Previously the (non-fd) fence returned from submit ioctl was a raw seqno, which is scoped to the ring. But from UABI standpoint, the ioctls related to seqno fences all specify a submitqueue. We can take advantage of that to replace the seqno fences with a cyclic idr handle. This is in preperation for moving to drm scheduler, at which point the submit ioctl will return after queuing the submit job to the scheduler, but before the submit is written into the ring (and therefore before a ring seqno has been assigned). Which means we need to replace the dma_fence that userspace may need to wait on with a scheduler fence. Signed-off-by: Rob Clark <robdclark@chromium.org> Acked-by: Christian König <christian.koenig@amd.com> Link: https://lore.kernel.org/r/20210728010632.2633470-8-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_gem_submit.c')
-rw-r--r--drivers/gpu/drm/msm/msm_gem_submit.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c
index 4f02fa3c78f9..f6f595aae2c5 100644
--- a/drivers/gpu/drm/msm/msm_gem_submit.c
+++ b/drivers/gpu/drm/msm/msm_gem_submit.c
@@ -68,7 +68,14 @@ void __msm_gem_submit_destroy(struct kref *kref)
container_of(kref, struct msm_gem_submit, ref);
unsigned i;
+ if (submit->fence_id) {
+ mutex_lock(&submit->queue->lock);
+ idr_remove(&submit->queue->fence_idr, submit->fence_id);
+ mutex_unlock(&submit->queue->lock);
+ }
+
dma_fence_put(submit->fence);
+
put_pid(submit->pid);
msm_submitqueue_put(submit->queue);
@@ -872,6 +879,20 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
goto out;
}
+ /*
+ * Allocate an id which can be used by WAIT_FENCE ioctl to map back
+ * to the underlying fence.
+ */
+ mutex_lock(&queue->lock);
+ submit->fence_id = idr_alloc_cyclic(&queue->fence_idr,
+ submit->fence, 0, INT_MAX, GFP_KERNEL);
+ mutex_unlock(&queue->lock);
+ if (submit->fence_id < 0) {
+ ret = submit->fence_id = 0;
+ submit->fence_id = 0;
+ goto out;
+ }
+
if (args->flags & MSM_SUBMIT_FENCE_FD_OUT) {
struct sync_file *sync_file = sync_file_create(submit->fence);
if (!sync_file) {
@@ -886,7 +907,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
msm_gpu_submit(gpu, submit);
- args->fence = submit->fence->seqno;
+ args->fence = submit->fence_id;
msm_reset_syncobjs(syncobjs_to_reset, args->nr_in_syncobjs);
msm_process_post_deps(post_deps, args->nr_out_syncobjs,