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| author | Rob Clark <robdclark@chromium.org> | 2021-07-27 18:06:12 -0700 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2021-07-27 18:09:18 -0700 |
| commit | a61acbbe9cf873f869fc634ae6f72f214f5994cc (patch) | |
| tree | 1c4533b31c383fda8359250d5a967cccdec8d98e /drivers/gpu/drm/msm/msm_fence.h | |
| parent | be40596bb5cf20cf9eaeddeeb57de7c4f570c886 (diff) | |
| download | linux-a61acbbe9cf873f869fc634ae6f72f214f5994cc.tar.bz2 | |
drm/msm: Track "seqno" fences by idr
Previously the (non-fd) fence returned from submit ioctl was a raw
seqno, which is scoped to the ring. But from UABI standpoint, the
ioctls related to seqno fences all specify a submitqueue. We can
take advantage of that to replace the seqno fences with a cyclic idr
handle.
This is in preperation for moving to drm scheduler, at which point
the submit ioctl will return after queuing the submit job to the
scheduler, but before the submit is written into the ring (and
therefore before a ring seqno has been assigned). Which means we
need to replace the dma_fence that userspace may need to wait on
with a scheduler fence.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Christian König <christian.koenig@amd.com>
Link: https://lore.kernel.org/r/20210728010632.2633470-8-robdclark@gmail.com
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_fence.h')
| -rw-r--r-- | drivers/gpu/drm/msm/msm_fence.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/msm/msm_fence.h b/drivers/gpu/drm/msm/msm_fence.h index 6ab97062ff1a..4783db528bcc 100644 --- a/drivers/gpu/drm/msm/msm_fence.h +++ b/drivers/gpu/drm/msm/msm_fence.h @@ -49,7 +49,6 @@ struct msm_fence_context { */ volatile uint32_t *fenceptr; - wait_queue_head_t event; spinlock_t spinlock; }; @@ -57,8 +56,6 @@ struct msm_fence_context * msm_fence_context_alloc(struct drm_device *dev, volatile uint32_t *fenceptr, const char *name); void msm_fence_context_free(struct msm_fence_context *fctx); -int msm_wait_fence(struct msm_fence_context *fctx, uint32_t fence, - ktime_t *timeout, bool interruptible); void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence); struct dma_fence * msm_fence_alloc(struct msm_fence_context *fctx); |