summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/msm/dp/dp_ctrl.h
diff options
context:
space:
mode:
authorKuogee Hsieh <khsieh@codeaurora.org>2021-02-05 12:44:38 -0800
committerRob Clark <robdclark@chromium.org>2021-02-06 09:28:17 -0800
commitea9f337ce81e315ef5643b7c843d6d8795461a5b (patch)
tree59bd13ad2224320f770ef3aa26353bddccdc05f9 /drivers/gpu/drm/msm/dp/dp_ctrl.h
parentc8d99bb938d3303989c4988caf090084073e85a2 (diff)
downloadlinux-ea9f337ce81e315ef5643b7c843d6d8795461a5b.tar.bz2
drm/msm/dp: reset dp controller only at boot up and pm_resume
DP_SW_RESET is the global SW reset that is used to initialize DP controller. If DP_SW_RESET executed during connection setup, two HPD related side effects may occurred, 1) pending HPD interrupts cleared unexpected 2) re start debounce logic which trigger another interrupt This patch only issue DP_SW_RESET at boot up and pm_resume. This patch also reinit video_comp before configure dp controller to avoid missing VIDEO_READY interrupt. Fixes: 9fc418430c65 ("drm/msm/dp: unplug interrupt missed after irq_hpd handler") Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/dp/dp_ctrl.h')
-rw-r--r--drivers/gpu/drm/msm/dp/dp_ctrl.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.h b/drivers/gpu/drm/msm/dp/dp_ctrl.h
index f60ba93c8678..a836bd358447 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.h
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.h
@@ -19,7 +19,7 @@ struct dp_ctrl {
u32 pixel_rate;
};
-int dp_ctrl_host_init(struct dp_ctrl *dp_ctrl, bool flip);
+int dp_ctrl_host_init(struct dp_ctrl *dp_ctrl, bool flip, bool reset);
void dp_ctrl_host_deinit(struct dp_ctrl *dp_ctrl);
int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl);
int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl);