diff options
| author | Mark Brown <broonie@kernel.org> | 2022-11-25 21:26:29 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2022-11-25 21:26:29 +0000 |
| commit | acdce7aa7a4fc1094661feb0b833ae2eec2ad2d0 (patch) | |
| tree | 7b6654b2110f660651bae25728b5ab59227faa56 /drivers/gpu/drm/msm/dp/dp_ctrl.c | |
| parent | a6d99022e56e8c1ddc4c75895ed9e3ce5da88453 (diff) | |
| parent | bf0d29fb51ff5e6c13097dbfed7b99e0e35b4a15 (diff) | |
| download | linux-acdce7aa7a4fc1094661feb0b833ae2eec2ad2d0.tar.bz2 | |
fsi: Add regmap and refactor sbefifo
Merge series from Eddie James <eajames@linux.ibm.com>:
The SBEFIFO hardware can now be attached over a new I2C endpoint interface
called the I2C Responder (I2CR). In order to use the existing SBEFIFO
driver, add a regmap driver for the FSI bus and an endpoint driver for the
I2CR. Then, refactor the SBEFIFO and OCC drivers to clean up and use the
new regmap driver or the I2CR interface.
This branch just has the regmap change so it can be shared with the FSI
code.
Diffstat (limited to 'drivers/gpu/drm/msm/dp/dp_ctrl.c')
| -rw-r--r-- | drivers/gpu/drm/msm/dp/dp_ctrl.c | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index 3854c9f1f7e9..dd26ca651a05 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -1243,8 +1243,7 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl, { int ret = 0; const u8 *dpcd = ctrl->panel->dpcd; - u8 encoding = DP_SET_ANSI_8B10B; - u8 ssc; + u8 encoding[] = { 0, DP_SET_ANSI_8B10B }; u8 assr; struct dp_link_info link_info = {0}; @@ -1256,13 +1255,11 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl, dp_aux_link_configure(ctrl->aux, &link_info); - if (drm_dp_max_downspread(dpcd)) { - ssc = DP_SPREAD_AMP_0_5; - drm_dp_dpcd_write(ctrl->aux, DP_DOWNSPREAD_CTRL, &ssc, 1); - } + if (drm_dp_max_downspread(dpcd)) + encoding[0] |= DP_SPREAD_AMP_0_5; - drm_dp_dpcd_write(ctrl->aux, DP_MAIN_LINK_CHANNEL_CODING_SET, - &encoding, 1); + /* config DOWNSPREAD_CTRL and MAIN_LINK_CHANNEL_CODING_SET */ + drm_dp_dpcd_write(ctrl->aux, DP_DOWNSPREAD_CTRL, encoding, 2); if (drm_dp_alternate_scrambler_reset_cap(dpcd)) { assr = DP_ALTERNATE_SCRAMBLER_RESET_ENABLE; |