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authorDouglas Anderson <dianders@chromium.org>2021-05-21 13:45:50 -0700
committerRob Clark <robdclark@chromium.org>2021-08-07 11:48:37 -0700
commitc9f737c7980b2d898a0ca4520bfdb1a6b9823e8e (patch)
treed1529fb58a4be0da053b349f799c2cddeaad2f9f /drivers/gpu/drm/msm/adreno
parent0710a740dc211ea4f94f5d2b887d5efafd524193 (diff)
downloadlinux-c9f737c7980b2d898a0ca4520bfdb1a6b9823e8e.tar.bz2
drm/msm: Use nvmem_cell_read_variable_le_u32() to read speed bin
Let's use the newly-added nvmem_cell_read_variable_le_u32() to future proof ourselves a little bit. Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210521134516.v2.1.Id496c6fea0cb92ff6ea8ef1faf5d468eb09465e3@changeid Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno')
-rw-r--r--drivers/gpu/drm/msm/adreno/a6xx_gpu.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index c19d2ae59de8..fc128046332f 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1724,10 +1724,10 @@ static u32 fuse_to_supp_hw(struct device *dev, struct adreno_rev rev, u32 fuse)
static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
{
u32 supp_hw = UINT_MAX;
- u16 speedbin;
+ u32 speedbin;
int ret;
- ret = nvmem_cell_read_u16(dev, "speed_bin", &speedbin);
+ ret = nvmem_cell_read_variable_le_u32(dev, "speed_bin", &speedbin);
/*
* -ENOENT means that the platform doesn't support speedbin which is
* fine
@@ -1740,7 +1740,6 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
ret);
goto done;
}
- speedbin = le16_to_cpu(speedbin);
supp_hw = fuse_to_supp_hw(dev, rev, speedbin);