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authorDan Carpenter <dan.carpenter@oracle.com>2022-03-07 16:31:05 +0300
committerRob Clark <robdclark@chromium.org>2022-03-08 09:49:00 -0800
commitaaa743d838da81ea173856c70caf96d8cdcbc320 (patch)
tree6b7f4522ef0d6a70d425b69f9c7fcedc44c290ff /drivers/gpu/drm/msm/adreno/adreno_gpu.c
parent9225b337072a10bf9b09df8bf281437488dd8a26 (diff)
downloadlinux-aaa743d838da81ea173856c70caf96d8cdcbc320.tar.bz2
drm/msm/adreno: fix cast in adreno_get_param()
These casts need to happen before the shift. The only time it would matter would be if "rev.core" is >= 128. In that case the sign bit would be extended and we do not want that. Fixes: afab9d91d872 ("drm/msm/adreno: Expose speedbin to userspace") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Link: https://lore.kernel.org/r/20220307133105.GA17534@kili Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/adreno_gpu.c')
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_gpu.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index c91ea363c373..9efc84929be0 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -244,10 +244,10 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
*value = !adreno_is_a650_family(adreno_gpu) ? 0x100000 : 0;
return 0;
case MSM_PARAM_CHIP_ID:
- *value = (uint64_t) adreno_gpu->rev.patchid |
- (uint64_t) (adreno_gpu->rev.minor << 8) |
- (uint64_t) (adreno_gpu->rev.major << 16) |
- (uint64_t) (adreno_gpu->rev.core << 24);
+ *value = (uint64_t)adreno_gpu->rev.patchid |
+ ((uint64_t)adreno_gpu->rev.minor << 8) |
+ ((uint64_t)adreno_gpu->rev.major << 16) |
+ ((uint64_t)adreno_gpu->rev.core << 24);
if (!adreno_gpu->info->revn)
*value |= ((uint64_t) adreno_gpu->speedbin) << 32;
return 0;