diff options
| author | Jordan Crouse <jcrouse@codeaurora.org> | 2020-09-03 20:03:13 -0600 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2020-09-04 12:14:15 -0700 |
| commit | f6828e0c4045f03f9cf2df6c2a768102641183f4 (patch) | |
| tree | c07c6625cf359e2e95aca5b864b9e159a27eea99 /drivers/gpu/drm/msm/adreno/a5xx_gpu.c | |
| parent | 7b3f3948c8b7053d771acc9f79810cc410f5e2e0 (diff) | |
| download | linux-f6828e0c4045f03f9cf2df6c2a768102641183f4.tar.bz2 | |
drm/msm: Disable the RPTR shadow
Disable the RPTR shadow across all targets. It will be selectively
re-enabled later for targets that need it.
Cc: stable@vger.kernel.org
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/a5xx_gpu.c')
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index e718f964d590..ce3c0b5c167b 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -703,8 +703,6 @@ static int a5xx_hw_init(struct msm_gpu *gpu) if (ret) return ret; - a5xx_preempt_hw_init(gpu); - if (!adreno_is_a510(adreno_gpu)) a5xx_gpmu_ucode_init(gpu); @@ -712,6 +710,15 @@ static int a5xx_hw_init(struct msm_gpu *gpu) if (ret) return ret; + /* Set the ringbuffer address */ + gpu_write64(gpu, REG_A5XX_CP_RB_BASE, REG_A5XX_CP_RB_BASE_HI, + gpu->rb[0]->iova); + + gpu_write(gpu, REG_A5XX_CP_RB_CNTL, + MSM_GPU_RB_CNTL_DEFAULT | AXXX_CP_RB_CNTL_NO_UPDATE); + + a5xx_preempt_hw_init(gpu); + /* Disable the interrupts through the initial bringup stage */ gpu_write(gpu, REG_A5XX_RBBM_INT_0_MASK, A5XX_INT_MASK); |