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| author | Rob Clark <robdclark@gmail.com> | 2016-09-28 19:58:32 -0400 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2016-11-27 11:23:09 -0500 |
| commit | 667ce33e57d0de4074a8fb62d24daeefd03f6333 (patch) | |
| tree | 414dba9fe67904d17057eedfa8a44d651dd67a31 /drivers/gpu/drm/msm/adreno/a3xx_gpu.c | |
| parent | 394da4b8f37e6ceceed68821957de5fc9e22b69b (diff) | |
| download | linux-667ce33e57d0de4074a8fb62d24daeefd03f6333.tar.bz2 | |
drm/msm: support multiple address spaces
We can have various combinations of 64b and 32b address space, ie. 64b
CPU but 32b display and gpu, or 64b CPU and GPU but 32b display. So
best to decouple the device iova's from mmap offset.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/a3xx_gpu.c')
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c index fd266ed963b6..156abf00c0e2 100644 --- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c @@ -583,7 +583,7 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev) #endif } - if (!gpu->mmu) { + if (!gpu->aspace) { /* TODO we think it is possible to configure the GPU to * restrict access to VRAM carveout. But the required * registers are unknown. For now just bail out and |