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authorGuillaume Ranquet <granquet@baylibre.com>2022-07-01 11:58:35 +0800
committerChun-Kuang Hu <chunkuang.hu@kernel.org>2022-07-04 22:26:12 +0800
commitcf060519e48e7ca9844325d73bc3225182ac6223 (patch)
tree981668ae7dc1512b0d1d7ff5487536db9469cb21 /drivers/gpu/drm/mediatek
parent4393c74a88cdbf36d8ccc315af09eae1bbe47ae2 (diff)
downloadlinux-cf060519e48e7ca9844325d73bc3225182ac6223.tar.bz2
drm/mediatek: dpi: Implement a CK/DE pol toggle in SoC config
Dp_intf does not support CK/DE polarity because the polarity information is not used for eDP and DP while dp_intf is only for eDP and DP. Therefore, we add a bit of flexibility to support SoCs without CK/DE pol support. Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220701035845.16458-7-rex-bc.chen@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/mediatek')
-rw-r--r--drivers/gpu/drm/mediatek/mtk_dpi.c23
1 files changed, 18 insertions, 5 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index d0e0152456d1..9b17507fe5d4 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -120,6 +120,7 @@ struct mtk_dpi_yc_limit {
* @edge_sel_en: Enable of edge selection.
* @output_fmts: Array of supported output formats.
* @num_output_fmts: Quantity of supported output formats.
+ * @is_ck_de_pol: Support CK/DE polarity.
*/
struct mtk_dpi_conf {
unsigned int (*cal_factor)(int clock);
@@ -128,6 +129,7 @@ struct mtk_dpi_conf {
bool edge_sel_en;
const u32 *output_fmts;
u32 num_output_fmts;
+ bool is_ck_de_pol;
};
static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
@@ -213,13 +215,20 @@ static void mtk_dpi_config_pol(struct mtk_dpi *dpi,
struct mtk_dpi_polarities *dpi_pol)
{
unsigned int pol;
+ unsigned int mask;
- pol = (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ? 0 : CK_POL) |
- (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ? 0 : DE_POL) |
- (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 : HSYNC_POL) |
+ mask = HSYNC_POL | VSYNC_POL;
+ pol = (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 : HSYNC_POL) |
(dpi_pol->vsync_pol == MTK_DPI_POLARITY_RISING ? 0 : VSYNC_POL);
- mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol,
- CK_POL | DE_POL | HSYNC_POL | VSYNC_POL);
+ if (dpi->conf->is_ck_de_pol) {
+ mask |= CK_POL | DE_POL;
+ pol |= (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ?
+ 0 : CK_POL) |
+ (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ?
+ 0 : DE_POL);
+ }
+
+ mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol, mask);
}
static void mtk_dpi_config_3d(struct mtk_dpi *dpi, bool en_3d)
@@ -794,6 +803,7 @@ static const struct mtk_dpi_conf mt8173_conf = {
.max_clock_khz = 300000,
.output_fmts = mt8173_output_fmts,
.num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
+ .is_ck_de_pol = true,
};
static const struct mtk_dpi_conf mt2701_conf = {
@@ -803,6 +813,7 @@ static const struct mtk_dpi_conf mt2701_conf = {
.max_clock_khz = 150000,
.output_fmts = mt8173_output_fmts,
.num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
+ .is_ck_de_pol = true,
};
static const struct mtk_dpi_conf mt8183_conf = {
@@ -811,6 +822,7 @@ static const struct mtk_dpi_conf mt8183_conf = {
.max_clock_khz = 100000,
.output_fmts = mt8183_output_fmts,
.num_output_fmts = ARRAY_SIZE(mt8183_output_fmts),
+ .is_ck_de_pol = true,
};
static const struct mtk_dpi_conf mt8192_conf = {
@@ -819,6 +831,7 @@ static const struct mtk_dpi_conf mt8192_conf = {
.max_clock_khz = 150000,
.output_fmts = mt8183_output_fmts,
.num_output_fmts = ARRAY_SIZE(mt8183_output_fmts),
+ .is_ck_de_pol = true,
};
static int mtk_dpi_probe(struct platform_device *pdev)