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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-10-15 22:30:27 +0300 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-10-24 21:22:25 +0300 |
commit | 99efd1c92b7ae8f46b74552513bfa975f080485b (patch) | |
tree | 69162ff29cf7d3a7a9b878845bb413cc77238881 /drivers/gpu/drm/i915/intel_pm.h | |
parent | bb6ae9e653dc1019312466cde7be3db69681d3b6 (diff) | |
download | linux-99efd1c92b7ae8f46b74552513bfa975f080485b.tar.bz2 |
drm/i915: Eliminate skl_check_pipe_max_pixel_rate()
The normal cdclk handling now takes care of making sure the
plane's pixel rate doesn't exceed the spec appointed percentage
of the cdclk frequency. Thus we can nuke
skl_check_pipe_max_pixel_rate().
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191015193035.25982-6-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.h b/drivers/gpu/drm/i915/intel_pm.h index 93d192d0610a..00a5801dfc06 100644 --- a/drivers/gpu/drm/i915/intel_pm.h +++ b/drivers/gpu/drm/i915/intel_pm.h @@ -64,8 +64,6 @@ void skl_write_plane_wm(struct intel_plane *plane, void skl_write_cursor_wm(struct intel_plane *plane, const struct intel_crtc_state *crtc_state); bool ilk_disable_lp_wm(struct drm_device *dev); -int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc, - struct intel_crtc_state *cstate); void intel_init_ipc(struct drm_i915_private *dev_priv); void intel_enable_ipc(struct drm_i915_private *dev_priv); |