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author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2018-10-04 16:15:56 -0700 |
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committer | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2018-10-11 14:23:03 -0700 |
commit | 91961a850d31a05067fe53a7fe16d255a1c8a159 (patch) | |
tree | 98b7628011d389e56713e4e92a7e7e63563723b3 /drivers/gpu/drm/i915/intel_pm.c | |
parent | ef51e0a3eb9e2477b4e7c4ece9a2e3ec26e3d2d7 (diff) | |
download | linux-91961a850d31a05067fe53a7fe16d255a1c8a159.tar.bz2 |
drm/i915: fix the transition minimums for gen9+ watermarks
The transition minimum is 14 blocks for gens 9 and 10, and 4 blocks
for gen 11. This minimum value is supposed to be added to the
configurable trans_amount. This matches both BSpec and additional
information provided by our HW engineers.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004231600.14101-3-paulo.r.zanoni@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 1392aa56a55a..983af46197b1 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4875,8 +4875,8 @@ static void skl_compute_transition_wm(struct intel_crtc_state *cstate, if (!dev_priv->ipc_enabled) goto exit; - trans_min = 0; - if (INTEL_GEN(dev_priv) >= 10) + trans_min = 14; + if (INTEL_GEN(dev_priv) >= 11) trans_min = 4; trans_offset_b = trans_min + trans_amount; |