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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2018-08-15 14:58:27 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-08-16 21:15:10 +0100 |
| commit | 66fc82960c5c68eecdcf4568e5907d3702e4fcdc (patch) | |
| tree | 776b194b7688f1c79e42b63b2de1cfbdf5b00ac2 /drivers/gpu/drm/i915/intel_lrc.c | |
| parent | dce888798d3ed1c7fea2d45f5f757a749a9e2584 (diff) | |
| download | linux-66fc82960c5c68eecdcf4568e5907d3702e4fcdc.tar.bz2 | |
drm/i915/execlists: Include reset depth in traces
Show the reset depth (the tasklet disable count) in the GEM_TRACE to
indicate when we might not expect tasklets to be flushed.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180815135827.25869-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lrc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 841895cfb05f..36050f085071 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1828,7 +1828,8 @@ execlists_reset_prepare(struct intel_engine_cs *engine) struct i915_request *request, *active; unsigned long flags; - GEM_TRACE("%s\n", engine->name); + GEM_TRACE("%s: depth<-%d\n", engine->name, + atomic_read(&execlists->tasklet.count)); /* * Prevent request submission to the hardware until we have @@ -1976,7 +1977,8 @@ static void execlists_reset_finish(struct intel_engine_cs *engine) */ __tasklet_enable_sync_once(&execlists->tasklet); - GEM_TRACE("%s\n", engine->name); + GEM_TRACE("%s: depth->%d\n", engine->name, + atomic_read(&execlists->tasklet.count)); } static int intel_logical_ring_emit_pdps(struct i915_request *rq) |