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| author | Jim Bride <jim.bride@linux.intel.com> | 2016-09-07 15:47:34 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2016-09-09 14:53:18 -0700 |
| commit | f169660ed4e57a03e6f6ed07fe192dbcb7687a0d (patch) | |
| tree | c213fcc264630a605c5687c83ebd2d18875e1fb3 /drivers/gpu/drm/i915/intel_drv.h | |
| parent | fbb30a5c463ff882980ce62d2ac27a0672efafb8 (diff) | |
| download | linux-f169660ed4e57a03e6f6ed07fe192dbcb7687a0d.tar.bz2 | |
drm/i915/dp: Add a standalone function to obtain shared dpll for HSW/BDW/SKL/BXT
Add the PLL selection code for HSW/BDW/BXT/SKL into a stand-alone function
in order to allow for the implementation of a platform neutral upfront
link training function.
v4:
* Removed dereferencing NULL pointer in case of failure (Dhinakaran Pandiyan)
v3:
* Add Hooks for all DDI platforms into this standalone function
v2:
* Change the macro to use dev_priv instead of dev (David Weinehall)
Reviewed-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 8c089e339c29..1bcf8ead2264 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1159,7 +1159,8 @@ void intel_ddi_clock_get(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config); void intel_ddi_set_vc_payload_alloc(struct drm_crtc *crtc, bool state); uint32_t ddi_signal_levels(struct intel_dp *intel_dp); - +struct intel_shared_dpll *intel_ddi_get_link_dpll(struct intel_dp *intel_dp, + int clock); unsigned int intel_fb_align_height(struct drm_device *dev, unsigned int height, uint32_t pixel_format, |