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authorDamien Lespiau <damien.lespiau@intel.com>2014-08-01 11:07:55 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-08-08 17:43:47 +0200
commita26aa8baee6c274fc23efccf46e891e63c8d0a30 (patch)
treeab40291aee512ad98d85398460a0b8fabe126371 /drivers/gpu/drm/i915/intel_ddi.c
parentce4dd49e97813740bd2b03ecdc51521be10f3bf1 (diff)
downloadlinux-a26aa8baee6c274fc23efccf46e891e63c8d0a30.tar.bz2
drm/i915/bdw: Provide the BDW specific HDMI buffer translation table
Among the changes, the tables has only 10 entries instead of 12 on HSW and the index the the 800mV/0dB entry has changed. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ddi.c28
1 files changed, 23 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 3af8340b21ec..75ac0b29aa3e 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -111,6 +111,20 @@ static const u32 bdw_ddi_translations_fdi[] = {
0x00FFFFFF, 0x00140006 /* HDMI parameters 800mV 0dB*/
};
+static const u32 bdw_ddi_translations_hdmi[] = {
+ /* Idx NT mV diff T mV diff db */
+ 0x00FFFFFF, 0x0007000E, /* 0: 400 400 0 */
+ 0x00D75FFF, 0x000E000A, /* 1: 400 600 3.5 */
+ 0x00BEFFFF, 0x00140006, /* 2: 400 800 6 */
+ 0x00FFFFFF, 0x0009000D, /* 3: 450 450 0 */
+ 0x00FFFFFF, 0x000E000A, /* 4: 600 600 0 */
+ 0x00D7FFFF, 0x00140006, /* 5: 600 800 2.5 */
+ 0x80CB2FFF, 0x001B0002, /* 6: 600 1000 4.5 */
+ 0x00FFFFFF, 0x00140006, /* 7: 800 800 0 */
+ 0x80E79FFF, 0x001B0002, /* 8: 800 1000 2 */
+ 0x80FFFFFF, 0x001B0002, /* 9: 1000 1000 0 */
+};
+
enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
{
struct drm_encoder *encoder = &intel_encoder->base;
@@ -150,18 +164,21 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
const u32 *ddi_translations_fdi;
const u32 *ddi_translations_dp;
const u32 *ddi_translations_edp;
+ const u32 *ddi_translations_hdmi;
const u32 *ddi_translations;
if (IS_BROADWELL(dev)) {
ddi_translations_fdi = bdw_ddi_translations_fdi;
ddi_translations_dp = bdw_ddi_translations_dp;
ddi_translations_edp = bdw_ddi_translations_edp;
- n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
- hdmi_800mV_0dB = 6;
+ ddi_translations_hdmi = bdw_ddi_translations_hdmi;
+ n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
+ hdmi_800mV_0dB = 7;
} else if (IS_HASWELL(dev)) {
ddi_translations_fdi = hsw_ddi_translations_fdi;
ddi_translations_dp = hsw_ddi_translations_dp;
ddi_translations_edp = hsw_ddi_translations_dp;
+ ddi_translations_hdmi = hsw_ddi_translations_hdmi;
n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
hdmi_800mV_0dB = 6;
} else {
@@ -169,8 +186,9 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
ddi_translations_edp = bdw_ddi_translations_dp;
ddi_translations_fdi = bdw_ddi_translations_fdi;
ddi_translations_dp = bdw_ddi_translations_dp;
- n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
- hdmi_800mV_0dB = 6;
+ ddi_translations_hdmi = bdw_ddi_translations_hdmi;
+ n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
+ hdmi_800mV_0dB = 7;
}
switch (port) {
@@ -207,7 +225,7 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
/* Entry 9 is for HDMI: */
for (i = 0; i < 2; i++) {
- I915_WRITE(reg, hsw_ddi_translations_hdmi[hdmi_level * 2 + i]);
+ I915_WRITE(reg, ddi_translations_hdmi[hdmi_level * 2 + i]);
reg += 4;
}
}