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| author | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2018-08-30 14:24:24 +0100 |
|---|---|---|
| committer | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2018-08-30 17:00:41 +0100 |
| commit | 096055487115883dc82fdebb5d16444585e4fc24 (patch) | |
| tree | 5952a669c89313e5933718993c1e6c9ae35fba55 /drivers/gpu/drm/i915/i915_drv.h | |
| parent | 381116d327b55b26cc99fb0fa78526c029fb969b (diff) | |
| download | linux-096055487115883dc82fdebb5d16444585e4fc24.tar.bz2 | |
drm/i915: clear error registers after error capture
We need to clear the register in order to get correct value after the
next potential hang.
v2: Centralize error register clearing in i915_irq.c (Chris)
v3: Don't read gen8 register on < gen6 (Chris)
v4: Don't swap gen8+ & gen6+ code... (Chris)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180830132424.21940-1-lionel.g.landwerlin@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 611b71462d3a..14e562887307 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2807,6 +2807,8 @@ extern void intel_irq_fini(struct drm_i915_private *dev_priv); int intel_irq_install(struct drm_i915_private *dev_priv); void intel_irq_uninstall(struct drm_i915_private *dev_priv); +void i915_clear_error_registers(struct drm_i915_private *dev_priv); + static inline bool intel_gvt_active(struct drm_i915_private *dev_priv) { return dev_priv->gvt; |