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| author | Changbin Du <changbin.du@intel.com> | 2018-01-30 19:19:54 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2018-03-06 13:19:21 +0800 |
| commit | b6c126a39345f7286bb25135efd9154419127427 (patch) | |
| tree | e36ba0c57197cdbf65da730c5b84e066e19b5d50 /drivers/gpu/drm/i915/gvt/gtt.h | |
| parent | e502a2af4c358d14ecf8fce51bf4988ebb4d10b4 (diff) | |
| download | linux-b6c126a39345f7286bb25135efd9154419127427.tar.bz2 | |
drm/i915/gvt: Manage shadow pages with radix tree
We don't know how many page tables will be shadowed. It varies
considerably corresponding to guest load. Radix tree is a better
choice for us. Since Page Frame Number is used as key so most of
the bits are common.
Here is some performance data (duration in us) of looking up a
element:
Before: (aka. ppgtt_find_shadow_page)
0.308 0.292 0.246 0.432 0.143 ... 0.311 0.225 0.382 0.199 0.325
After: (aka. intel_vgpu_find_spt_by_mfn)
0.106 0.106 0.107 0.106 0.105 0.107 ... 0.107 0.109 0.105 0.108
This time I didn't get the early data of hash table. The data is
measured when desktop is shown.
As last change, the overall benchmark almost is not changed, but
we get better scalability.
Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/gtt.h')
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/gtt.h | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/gvt/gtt.h b/drivers/gpu/drm/i915/gvt/gtt.h index 695ab3bd4a69..e831507e17c3 100644 --- a/drivers/gpu/drm/i915/gvt/gtt.h +++ b/drivers/gpu/drm/i915/gvt/gtt.h @@ -39,7 +39,6 @@ struct intel_vgpu_mm; -#define INTEL_GVT_GTT_HASH_BITS 8 #define INTEL_GVT_INVALID_ADDR (~0UL) struct intel_gvt_gtt_entry { @@ -186,7 +185,7 @@ struct intel_vgpu_gtt { struct intel_vgpu_mm *ggtt_mm; unsigned long active_ppgtt_mm_bitmap; struct list_head ppgtt_mm_list_head; - DECLARE_HASHTABLE(spt_hash_table, INTEL_GVT_GTT_HASH_BITS); + struct radix_tree_root spt_tree; struct list_head oos_page_list_head; struct list_head post_shadow_list_head; struct intel_vgpu_scratch_pt scratch_pt[GTT_TYPE_MAX]; @@ -217,7 +216,6 @@ struct intel_vgpu_oos_page { struct intel_vgpu_ppgtt_spt { atomic_t refcount; struct intel_vgpu *vgpu; - struct hlist_node node; struct { intel_gvt_gtt_type_t type; |