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authorMatthew Brost <matthew.brost@intel.com>2022-04-15 15:40:24 -0700
committerJohn Harrison <John.C.Harrison@Intel.com>2022-04-19 11:33:47 -0700
commit717f9bad5d25d5cf9f750c88a41627a71fad7b23 (patch)
tree7a410489585e68fd2ad7f7888f4fd6cad37c42d8 /drivers/gpu/drm/i915/gt/uc/intel_guc.c
parentdfa57ecf77c66eb28ac7760f582bfd7d4183c429 (diff)
downloadlinux-717f9bad5d25d5cf9f750c88a41627a71fad7b23.tar.bz2
drm/i915/dg2: Enable Wa_14014475959 - RCS / CCS context exit
There is bug in DG2 where if the CCS contexts switches out while the RCS is running it can cause memory corruption. To workaround this add an atomic to a memory address with a value 1 and semaphore wait to the same address for a value of 0. The GuC firmware is responsible for writing 0 to the memory address when it is safe for the context to switch out. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220415224025.3693037-6-umesh.nerlige.ramappa@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/uc/intel_guc.c')
-rw-r--r--drivers/gpu/drm/i915/gt/uc/intel_guc.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 830889349756..228070e31ef0 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -296,6 +296,10 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
if (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_B0))
flags |= GUC_WA_GAM_CREDITS;
+ /* Wa_14014475959:dg2 */
+ if (IS_DG2(gt->i915))
+ flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
+
/*
* Wa_14012197797:dg2_g10:a0,dg2_g11:a0
* Wa_22011391025:dg2_g10,dg2_g11,dg2_g12