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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-08-19 19:44:03 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-08-19 20:07:03 +0100 |
| commit | cc3375607d79c368ec1dbeb4c2922371fffa19ca (patch) | |
| tree | bae76dc5054fbc15658a8d9f752cae4a1603fdb3 /drivers/gpu/drm/i915/gem/i915_gem_clflush.c | |
| parent | e1d7b66b815a542114169609c8f1b4e46856d7be (diff) | |
| download | linux-cc3375607d79c368ec1dbeb4c2922371fffa19ca.tar.bz2 | |
drm/i915: Use 0 for the unordered context
Since commit 078dec3326e2 ("dma-buf: add dma_fence_get_stub") the 0
fence context became an impossible match as it is used for an always
signaled fence. We can simplify our timeline tracking by knowing that 0
always means no match.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190819184404.24200-1-chris@chris-wilson.co.uk
Link: https://patchwork.freedesktop.org/patch/msgid/20190819175109.5241-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gem/i915_gem_clflush.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c index 77944950d4c9..835d6756ba49 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c @@ -134,8 +134,7 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj, dma_fence_init(&clflush->dma, &i915_clflush_ops, &clflush_lock, - to_i915(obj->base.dev)->mm.unordered_timeline, - 0); + 0, 0); i915_sw_fence_init(&clflush->wait, i915_clflush_notify); clflush->obj = i915_gem_object_get(obj); |