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authorVille Syrjälä <ville.syrjala@linux.intel.com>2022-05-10 13:42:35 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2022-05-27 20:28:30 +0300
commit67090801489d0a4c80c121494b749e1e97573447 (patch)
tree9c2edc89ca983510a6d31524854d1f72082ad990 /drivers/gpu/drm/i915/display/intel_pps.c
parent8e75e8f573e1ff4a0c93c3be1554d2bfd5ae6029 (diff)
downloadlinux-67090801489d0a4c80c121494b749e1e97573447.tar.bz2
drm/i915/pps: Reinit PPS delays after VBT has been fully parsed
During the eDP probe we may not yet know the panel_type used to index the VBT panel tables. So the initial eDP probe will have to be done without that, and thus we won't yet have the PPS delays from the VBT. Once the VBT has been fully parse we should reinit the PPS delays to make sure it's fully accounted for. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220510104242.6099-9-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_pps.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_pps.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index b8053897dc68..bcc70a329ecf 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1438,6 +1438,11 @@ void intel_pps_init_late(struct intel_dp *intel_dp)
intel_wakeref_t wakeref;
with_intel_pps_lock(intel_dp, wakeref) {
+ /* Reinit delays after per-panel info has been parsed from VBT */
+ memset(&intel_dp->pps.pps_delays, 0, sizeof(intel_dp->pps.pps_delays));
+ pps_init_delays(intel_dp);
+ pps_init_registers(intel_dp, false);
+
if (edp_have_panel_vdd(intel_dp))
edp_panel_vdd_schedule_off(intel_dp);
}