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| author | Anusha Srivatsa <anusha.srivatsa@intel.com> | 2021-05-18 17:06:24 -0700 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2021-05-19 23:59:34 -0700 |
| commit | e2ca757b6fa415e1aed7bffa240dda918d2301a4 (patch) | |
| tree | 0bca0463f0e110130f0ee1ec64a47452229e8bd3 /drivers/gpu/drm/i915/display/intel_bw.c | |
| parent | 414002f1bb8e5a7824ed43373d8de9ba7c658301 (diff) | |
| download | linux-e2ca757b6fa415e1aed7bffa240dda918d2301a4.tar.bz2 | |
drm/i915/adlp: Add PIPE_MISC2 programming
When scalers are enabled, we need to program underrun
bubble counter to 0x50 to avoid Soft Pipe A underruns.
Make sure other bits dont get overwritten.
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210519000625.3184321-17-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_bw.c')
0 files changed, 0 insertions, 0 deletions