diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-01-20 19:47:19 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-01-31 17:00:44 +0200 |
| commit | 1965de63a93aecd788874e921f074b52fbea81a8 (patch) | |
| tree | b51bb5f82b3ffb632cdebc8fd34b071337916a2c /drivers/gpu/drm/i915/display/intel_atomic_plane.c | |
| parent | 5604e9ceaed59956c5027832c9f09d48ab3126cb (diff) | |
| download | linux-1965de63a93aecd788874e921f074b52fbea81a8.tar.bz2 | |
drm/i915: Extract intel_cdclk_state
Use the same structure to store the cdclk state in both
intel_atomic_state and dev_priv. First step towards proper
old vs. new cdclk states.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200120174728.21095-10-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_atomic_plane.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_atomic_plane.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index d1345a9ed040..7367ad0bf27c 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -159,6 +159,8 @@ bool intel_plane_calc_min_cdclk(struct intel_atomic_state *state, struct intel_plane *plane) { struct drm_i915_private *dev_priv = to_i915(plane->base.dev); + const struct intel_cdclk_state *cdclk_state = + &dev_priv->cdclk_state; const struct intel_plane_state *plane_state = intel_atomic_get_new_plane_state(state, plane); struct intel_crtc *crtc = to_intel_crtc(plane_state->hw.crtc); @@ -182,12 +184,12 @@ bool intel_plane_calc_min_cdclk(struct intel_atomic_state *state, * safe as long we hold at least one crtc mutex (which * must be true since we have crtc_state). */ - if (crtc_state->min_cdclk[plane->id] > dev_priv->cdclk.logical.cdclk) { + if (crtc_state->min_cdclk[plane->id] > cdclk_state->logical.cdclk) { drm_dbg_kms(&dev_priv->drm, "[PLANE:%d:%s] min_cdclk (%d kHz) > logical cdclk (%d kHz)\n", plane->base.base.id, plane->base.name, crtc_state->min_cdclk[plane->id], - dev_priv->cdclk.logical.cdclk); + cdclk_state->logical.cdclk); return true; } |