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| author | Daniel Kurtz <djkurtz@chromium.org> | 2012-03-30 19:46:40 +0800 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-04-12 21:14:07 +0200 |
| commit | 56f9eac05489912ac0165ffc0ebff0f8588f77d2 (patch) | |
| tree | 5866d4fe25e1e618ec8680e9eb25c0bbf85ec8ae /drivers/gpu/drm/drm_edid.c | |
| parent | 72d66afd1461effb143784a0f6cde2a9f9908b70 (diff) | |
| download | linux-56f9eac05489912ac0165ffc0ebff0f8588f77d2.tar.bz2 | |
drm/i915/intel_i2c: use INDEX cycles for i2c read transactions
It is very common for an i2c device to require a small 1 or 2 byte write
followed by a read. For example, when reading from an i2c EEPROM it is
common to write and address, offset or index followed by a reading some
values.
The i915 gmbus controller provides a special "INDEX" cycle for performing
such a small write followed by a read. The INDEX can be either one or two
bytes long. The advantage of using such a cycle is that the CPU has
slightly less work to do once the read with INDEX cycle is started.
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/drm_edid.c')
0 files changed, 0 insertions, 0 deletions