diff options
| author | Andrzej Hajda <a.hajda@samsung.com> | 2017-02-01 08:47:50 +0100 |
|---|---|---|
| committer | Archit Taneja <architt@codeaurora.org> | 2017-02-02 15:15:30 +0530 |
| commit | a21e658bfbcdbbac26e92a76aa22db507b439f7c (patch) | |
| tree | 09e8d43029a9be0c511742084ec0c1353b237549 /drivers/gpu/drm/bridge/sil-sii8620.h | |
| parent | 581a923730b41e678579aa268d4155bf345859fd (diff) | |
| download | linux-a21e658bfbcdbbac26e92a76aa22db507b439f7c.tar.bz2 | |
drm/bridge/sii8620: add HSIC initialization code
In case of MHL3 HSIC should be initialized.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1485935272-17337-24-git-send-email-a.hajda@samsung.com
Diffstat (limited to 'drivers/gpu/drm/bridge/sil-sii8620.h')
| -rw-r--r-- | drivers/gpu/drm/bridge/sil-sii8620.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.h b/drivers/gpu/drm/bridge/sil-sii8620.h index 312b07f38a09..51ab540cf092 100644 --- a/drivers/gpu/drm/bridge/sil-sii8620.h +++ b/drivers/gpu/drm/bridge/sil-sii8620.h @@ -353,7 +353,7 @@ #define REG_TTXNUMB 0x0116 #define MSK_TTXNUMB_TTX_AFFCTRL_3_0 0xf0 #define BIT_TTXNUMB_TTX_COM1_AT_SYNC_WAIT BIT(3) -#define MSK_TTXNUMB_TTX_NUMBPS_2_0 0x07 +#define MSK_TTXNUMB_TTX_NUMBPS 0x07 /* TDM TX NUMSPISYM, default value: 0x04 */ #define REG_TTXSPINUMS 0x0117 @@ -433,12 +433,14 @@ /* HSIC Keeper, default value: 0x00 */ #define REG_KEEPER 0x0181 -#define MSK_KEEPER_KEEPER_MODE_1_0 0x03 +#define MSK_KEEPER_MODE 0x03 +#define VAL_KEEPER_MODE_HOST 0 +#define VAL_KEEPER_MODE_DEVICE 2 /* HSIC Flow Control General, default value: 0x02 */ #define REG_FCGC 0x0183 -#define BIT_FCGC_HSIC_FC_HOSTMODE BIT(1) -#define BIT_FCGC_HSIC_FC_ENABLE BIT(0) +#define BIT_FCGC_HSIC_HOSTMODE BIT(1) +#define BIT_FCGC_HSIC_ENABLE BIT(0) /* HSIC Flow Control CTR13, default value: 0xfc */ #define REG_FCCTR13 0x0191 |