diff options
| author | Russell King <rmk+kernel@armlinux.org.uk> | 2018-07-30 11:52:34 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2018-07-30 11:52:34 +0100 |
| commit | b5bae71a79d712681bdf48ee029f1953697924f7 (patch) | |
| tree | 5149e28b6b92a7ba52a4cae9ca49ee138767df34 /drivers/gpu/drm/armada/armada_overlay.c | |
| parent | 4aafe00e2f6bb43656d690b6241f80bb8c236168 (diff) | |
| download | linux-b5bae71a79d712681bdf48ee029f1953697924f7.tar.bz2 | |
drm/armada: push interlace calculation into armada_drm_plane_calc()
Push the interlaced frame calculation down into armada_drm_plane_calc()
which needs to apply the same correction for both the overlay and
primary planes.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'drivers/gpu/drm/armada/armada_overlay.c')
| -rw-r--r-- | drivers/gpu/drm/armada/armada_overlay.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/drm/armada/armada_overlay.c b/drivers/gpu/drm/armada/armada_overlay.c index f36f6fb919e7..7de8b6bd7847 100644 --- a/drivers/gpu/drm/armada/armada_overlay.c +++ b/drivers/gpu/drm/armada/armada_overlay.c @@ -131,21 +131,21 @@ static void armada_drm_overlay_plane_atomic_update(struct drm_plane *plane, old_state->fb != state->fb) { const struct drm_format_info *format; u16 src_x, pitches[3]; - u32 addrs[3]; + u32 addrs[2][3]; - armada_drm_plane_calc(state, addrs, pitches); + armada_drm_plane_calc(state, addrs, pitches, false); - armada_reg_queue_set(regs, idx, addrs[0], + armada_reg_queue_set(regs, idx, addrs[0][0], LCD_SPU_DMA_START_ADDR_Y0); - armada_reg_queue_set(regs, idx, addrs[1], + armada_reg_queue_set(regs, idx, addrs[0][1], LCD_SPU_DMA_START_ADDR_U0); - armada_reg_queue_set(regs, idx, addrs[2], + armada_reg_queue_set(regs, idx, addrs[0][2], LCD_SPU_DMA_START_ADDR_V0); - armada_reg_queue_set(regs, idx, addrs[0], + armada_reg_queue_set(regs, idx, addrs[1][0], LCD_SPU_DMA_START_ADDR_Y1); - armada_reg_queue_set(regs, idx, addrs[1], + armada_reg_queue_set(regs, idx, addrs[1][1], LCD_SPU_DMA_START_ADDR_U1); - armada_reg_queue_set(regs, idx, addrs[2], + armada_reg_queue_set(regs, idx, addrs[1][2], LCD_SPU_DMA_START_ADDR_V1); val = pitches[0] << 16 | pitches[0]; |