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| author | Russell King <rmk+kernel@armlinux.org.uk> | 2018-07-30 11:52:34 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2018-07-30 11:52:34 +0100 |
| commit | 4e4b3563ac006e47761341682de80528e2cf30ab (patch) | |
| tree | 749d3f369ea33ed8abb9332d867cb9ff73c4a757 /drivers/gpu/drm/armada/armada_510.c | |
| parent | a61c3922f6293ab5d58f64e2312981cc646c2fd8 (diff) | |
| download | linux-4e4b3563ac006e47761341682de80528e2cf30ab.tar.bz2 | |
drm/armada: clean up SPU_ADV_REG
Rather than writing all bits of SPU_ADV_REG on modeset, only write
what we need to change, and initialise the register in the variant
initialisation.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'drivers/gpu/drm/armada/armada_510.c')
| -rw-r--r-- | drivers/gpu/drm/armada/armada_510.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/armada/armada_510.c b/drivers/gpu/drm/armada/armada_510.c index 41a784f5a5e6..9a4fbb6a24b8 100644 --- a/drivers/gpu/drm/armada/armada_510.c +++ b/drivers/gpu/drm/armada/armada_510.c @@ -27,6 +27,10 @@ static int armada510_crtc_init(struct armada_crtc *dcrtc, struct device *dev) /* Lower the watermark so to eliminate jitter at higher bandwidths */ armada_updatel(0x20, (1 << 11) | 0xff, dcrtc->base + LCD_CFG_RDREG4F); + /* Initialise SPU register */ + writel_relaxed(ADV_HWC32ENABLE | ADV_HWC32ARGB | ADV_HWC32BLEND, + dcrtc->base + LCD_SPU_ADV_REG); + return 0; } @@ -77,7 +81,6 @@ static int armada510_crtc_compute_clock(struct armada_crtc *dcrtc, const struct armada_variant armada510_ops = { .has_spu_adv_reg = true, - .spu_adv_reg = ADV_HWC32ENABLE | ADV_HWC32ARGB | ADV_HWC32BLEND, .init = armada510_crtc_init, .compute_clock = armada510_crtc_compute_clock, }; |