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| author | Lowry Li (Arm Technology China) <Lowry.Li@arm.com> | 2019-09-06 07:18:06 +0000 |
|---|---|---|
| committer | james qian wang (Arm Technology China) <james.qian.wang@arm.com> | 2019-09-27 16:02:33 +0800 |
| commit | d6cb013579e743bc7bc5590ca35a1943f2b8f3c8 (patch) | |
| tree | e90caaa8352f70bdf6490d8a71542360f8ca8533 /drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h | |
| parent | 245f44e77101df44e1074c765732b5613579179d (diff) | |
| download | linux-d6cb013579e743bc7bc5590ca35a1943f2b8f3c8.tar.bz2 | |
drm/komeda: SW workaround for D71 doesn't flush shadow registers
This is a SW workaround for shadow un-flushed when together with the
DOU Timing-disable.
D71 HW doesn't update shadow registers when display output is turned
off. So when we disable all pipeline components together with display
output disabling by one flush or one operation, the disable operation
updated registers will not be flushed or valid in HW, which may lead
problem. To workaround this problem, introduce a two phase disable for
pipeline disable.
Phase1: Disable components with display is on and flush it, this phase
for flushing or validating the shadow registers.
Phase2: Turn-off display output.
Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190906071750.4563-1-lowry.li@arm.com
Diffstat (limited to 'drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h')
| -rw-r--r-- | drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h index a7a84e66549d..8401cc0cdfe7 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h @@ -389,6 +389,18 @@ struct komeda_pipeline { int id; /** @avail_comps: available components mask of pipeline */ u32 avail_comps; + /** + * @standalone_disabled_comps: + * + * When disable the pipeline, some components can not be disabled + * together with others, but need a sparated and standalone disable. + * The standalone_disabled_comps are the components which need to be + * disabled standalone, and this concept also introduce concept of + * two phase. + * phase 1: for disabling the common components. + * phase 2: for disabling the standalong_disabled_comps. + */ + u32 standalone_disabled_comps; /** @n_layers: the number of layer on @layers */ int n_layers; /** @layers: the pipeline layers */ @@ -534,7 +546,7 @@ int komeda_release_unclaimed_resources(struct komeda_pipeline *pipe, struct komeda_pipeline_state * komeda_pipeline_get_old_state(struct komeda_pipeline *pipe, struct drm_atomic_state *state); -void komeda_pipeline_disable(struct komeda_pipeline *pipe, +bool komeda_pipeline_disable(struct komeda_pipeline *pipe, struct drm_atomic_state *old_state); void komeda_pipeline_update(struct komeda_pipeline *pipe, struct drm_atomic_state *old_state); |